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bf224860c8
DAGcombine's ability to find reasons to remove truncates when they were not needed. Consequently, the CellSPU backend would produce correct, but _really slow and horrible_, code. Replaced with instruction sequences that do the equivalent truncation in SPUInstrInfo.td. - Re-examine how unaligned loads and stores work. Generated unaligned load code has been tested on the CellSPU hardware; see the i32operations.c and i64operations.c in CodeGen/CellSPU/useful-harnesses. (While they may be toy test code, it does prove that some real world code does compile correctly.) - Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc fault because i64 ult is not yet implemented.) - Added i64 eq and neq for setcc and select/setcc; started new instruction information file for them in SPU64InstrInfo.td. Additional i64 operations should be added to this file and not to SPUInstrInfo.td. llvm-svn: 61447
50 lines
2.4 KiB
LLVM
50 lines
2.4 KiB
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s
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; RUN: grep bisl %t1.s | count 7
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; RUN: grep ila %t1.s | count 1
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; RUN: grep rotqby %t1.s | count 6
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; RUN: grep lqa %t1.s | count 1
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; RUN: grep lqd %t1.s | count 12
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; RUN: grep dispatch_tab %t1.s | count 5
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; RUN: grep bisl %t2.s | count 7
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; RUN: grep ilhu %t2.s | count 2
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; RUN: grep iohl %t2.s | count 2
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; RUN: grep rotqby %t2.s | count 6
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; RUN: grep lqd %t2.s | count 13
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; RUN: grep ilhu %t2.s | count 2
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; RUN: grep ai %t2.s | count 9
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; RUN: grep dispatch_tab %t2.s | count 6
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; ModuleID = 'call_indirect.bc'
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
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target triple = "spu-unknown-elf"
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@dispatch_tab = global [6 x void (i32, float)*] zeroinitializer, align 16
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define void @dispatcher(i32 %i_arg, float %f_arg) {
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entry:
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%tmp2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 0), align 16
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tail call void %tmp2( i32 %i_arg, float %f_arg )
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%tmp2.1 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 1), align 4
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tail call void %tmp2.1( i32 %i_arg, float %f_arg )
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%tmp2.2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 2), align 4
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tail call void %tmp2.2( i32 %i_arg, float %f_arg )
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%tmp2.3 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 3), align 4
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tail call void %tmp2.3( i32 %i_arg, float %f_arg )
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%tmp2.4 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 4), align 4
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tail call void %tmp2.4( i32 %i_arg, float %f_arg )
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%tmp2.5 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 5), align 4
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tail call void %tmp2.5( i32 %i_arg, float %f_arg )
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ret void
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}
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@ptr_list = internal global [1 x void ()*] [ void ()* inttoptr (i64 4294967295 to void ()*) ], align 4
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@ptr.a = internal global void ()** getelementptr ([1 x void ()*]* @ptr_list, i32 0, i32 1), align 16
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define void @double_indirect_call() {
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%a = load void ()*** @ptr.a, align 16
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%b = load void ()** %a, align 4
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tail call void %b()
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ret void
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}
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