llvm-mirror/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
Dan Gohman 5f6f8101d5 Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897
2009-06-04 22:49:04 +00:00

21 lines
744 B
LLVM

; RUN: llvm-as < %s | llc -march=x86
define i32 @test() {
br i1 false, label %cond_next33, label %cond_true12
cond_true12: ; preds = %0
ret i32 0
cond_next33: ; preds = %0
%tmp44.i = call double @foo( double 0.000000e+00, i32 32 ) ; <double> [#uses=1]
%tmp61.i = load i8* null ; <i8> [#uses=1]
%tmp61.i.upgrd.1 = zext i8 %tmp61.i to i32 ; <i32> [#uses=1]
%tmp58.i = or i32 0, %tmp61.i.upgrd.1 ; <i32> [#uses=1]
%tmp62.i = or i32 %tmp58.i, 0 ; <i32> [#uses=1]
%tmp62.i.upgrd.2 = sitofp i32 %tmp62.i to double ; <double> [#uses=1]
%tmp64.i = fadd double %tmp62.i.upgrd.2, %tmp44.i ; <double> [#uses=1]
%tmp68.i = call double @foo( double %tmp64.i, i32 0 ) ; <double> [#uses=0]
ret i32 0
}
declare double @foo(double, i32)