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0199002e6e
CFI instructions that set appropriate cfa offset and cfa register are now inserted in emitEpilogue() in X86FrameLowering. Majority of the changes in this patch: 1. Ensure that CFI instructions do not affect code generation. 2. Enable maintaining correct information about cfa offset and cfa register in a function when basic blocks are reordered, merged, split, duplicated. These changes are target independent and described below. Changed CFI instructions so that they: 1. are duplicable 2. are not counted as instructions when tail duplicating or tail merging 3. can be compared as equal Add information to each MachineBasicBlock about cfa offset and cfa register that are valid at its entry and exit (incoming and outgoing CFI info). Add support for updating this information when basic blocks are merged, split, duplicated, created. Add a verification pass (CFIInfoVerifier) that checks that outgoing cfa offset and register of predecessor blocks match incoming values of their successors. Incoming and outgoing CFI information is used by a late pass (CFIInstrInserter) that corrects CFA calculation rule for a basic block if needed. That means that additional CFI instructions get inserted at basic block beginning to correct the rule for calculating CFA. Having CFI instructions in function epilogue can cause incorrect CFA calculation rule for some basic blocks. This can happen if, due to basic block reordering, or the existence of multiple epilogue blocks, some of the blocks have wrong cfa offset and register values set by the epilogue block above them. Patch by Violeta Vukobrat. Differential Revision: https://reviews.llvm.org/D18046 llvm-svn: 306529
70 lines
3.0 KiB
LLVM
70 lines
3.0 KiB
LLVM
; RUN: llc -mtriple=x86_64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | FileCheck %s
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; REQUIRES: asserts
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; CHECK-LABEL: Pass Arguments:
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; CHECK-NEXT: Target Library Information
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; CHECK-NEXT: Target Pass Configuration
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; CHECK-NEXT: Machine Module Information
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; CHECK-NEXT: Target Transform Information
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; CHECK-NEXT: Type-Based Alias Analysis
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; CHECK-NEXT: Scoped NoAlias Alias Analysis
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; CHECK-NEXT: Assumption Cache Tracker
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; CHECK-NEXT: Create Garbage Collector Module Metadata
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; CHECK-NEXT: Machine Branch Probability Analysis
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; CHECK-NEXT: ModulePass Manager
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; CHECK-NEXT: Pre-ISel Intrinsic Lowering
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Expand Atomic instructions
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; CHECK-NEXT: Dominator Tree Construction
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; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Lower Garbage Collection Instructions
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; CHECK-NEXT: Shadow Stack GC Lowering
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; CHECK-NEXT: Remove unreachable blocks from the CFG
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; CHECK-NEXT: Inserts calls to mcount-like functions
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; CHECK-NEXT: Scalarize Masked Memory Intrinsics
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; CHECK-NEXT: Expand reduction intrinsics
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; CHECK-NEXT: Rewrite Symbols
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Dominator Tree Construction
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; CHECK-NEXT: Exception handling preparation
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; CHECK-NEXT: Safe Stack instrumentation pass
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; CHECK-NEXT: Insert stack protectors
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: X86 DAG->DAG Instruction Selection
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; CHECK-NEXT: X86 PIC Global Base Reg Initialization
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; CHECK-NEXT: Expand ISel Pseudo-instructions
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; CHECK-NEXT: Local Stack Slot Allocation
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; CHECK-NEXT: X86 WinAlloca Expander
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Bundle Machine CFG Edges
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; CHECK-NEXT: X86 FP Stackifier
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; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
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; CHECK-NEXT: Post-RA pseudo instruction expansion pass
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; CHECK-NEXT: X86 pseudo instruction expansion pass
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; CHECK-NEXT: Analyze Machine Code For Garbage Collection
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; CHECK-NEXT: Verify that corresponding in/out CFI info matches
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; CHECK-NEXT: X86 vzeroupper inserter
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; CHECK-NEXT: CFI Instruction Inserter
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; CHECK-NEXT: Contiguously Lay Out Funclets
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; CHECK-NEXT: StackMap Liveness Analysis
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; CHECK-NEXT: Live DEBUG_VALUE analysis
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; CHECK-NEXT: Insert fentry calls
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: Machine Natural Loop Construction
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; CHECK-NEXT: Insert XRay ops
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; CHECK-NEXT: Implement the 'patchable-function' attribute
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: Machine Natural Loop Construction
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; CHECK-NEXT: X86 Assembly Printer
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; CHECK-NEXT: Free MachineFunction
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define void @f() {
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ret void
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}
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