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1701d245d4
Summary: These ISA's didn't add any instructions so they are almost identical to Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA revision in .MIPS.abiflags is 3 or 5 respectively instead of 2. Reviewers: vmedic Reviewed By: vmedic Subscribers: tomatabacu, llvm-commits, atanasyan Differential Revision: http://reviews.llvm.org/D7381 llvm-svn: 229695
76 lines
1.6 KiB
ArmAsm
76 lines
1.6 KiB
ArmAsm
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips1 | \
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# RUN: FileCheck %s
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.text
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.set noreorder
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.set mips1
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add $2, $2, $2
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.set mips2
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ll $2,-2($2)
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.set mips3
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dadd $2,$2,$2
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.set mips4
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ldxc1 $f8,$2($4)
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.set mips5
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luxc1 $f19,$2($4)
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.set mips32
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clo $2,$2
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.set mips32r2
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rotr $2,15
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.set mips32
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.set mips32r3
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rotr $2,15
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.set mips32
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.set mips32r5
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rotr $2,15
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.set mips32r6
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mod $2, $4, $6
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.set mips64
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daddi $2, $2, 10
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.set mips64r2
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drotr32 $1,$14,15
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.set mips64
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.set mips64r3
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drotr32 $1,$14,15
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.set mips64
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.set mips64r5
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drotr32 $1,$14,15
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.set mips64r6
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mod $2, $4, $6
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# CHECK: .set noreorder
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# CHECK: .set mips1
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# CHECK: add $2, $2, $2
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# CHECK: .set mips2
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# CHECK: ll $2, -2($2)
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# CHECK: .set mips3
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# CHECK: dadd $2, $2, $2
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# CHECK: .set mips4
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# CHECK: ldxc1 $f8, $2($4)
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# CHECK: .set mips5
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# CHECK: luxc1 $f19, $2($4)
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# CHECK: .set mips32
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# CHECK: clo $2, $2
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# CHECK: .set mips32r2
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# CHECK: rotr $2, $2, 15
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# CHECK: .set mips32
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# CHECK: .set mips32r3
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# CHECK: rotr $2, $2, 15
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# CHECK: .set mips32
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# CHECK: .set mips32r5
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# CHECK: rotr $2, $2, 15
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# CHECK: .set mips32r6
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# CHECK: mod $2, $4, $6
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# CHECK: .set mips64
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# CHECK: daddi $2, $2, 10
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# CHECK: .set mips64r2
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# CHECK: drotr32 $1, $14, 15
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# CHECK: .set mips64
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# CHECK: .set mips64r3
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# CHECK: drotr32 $1, $14, 15
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# CHECK: .set mips64
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# CHECK: .set mips64r5
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# CHECK: drotr32 $1, $14, 15
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# CHECK: .set mips64r6
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# CHECK: mod $2, $4, $6
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