Jim Grosbach 044acb8bee ARM assembly parsing for register range syntax for VLD/VST register lists. ... For example, vld1.f64 {d2-d5}, [r2,:128]! Should be equivalent to: vld1.f64 {d2,d3,d4,d5}, [r2,:128]! It's not documented syntax in the ARM ARM, but it is consistent with what's accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to support. rdar://10451128 llvm-svn: 144727		2011-11-15 23:19:15 +00:00
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CodeGen	AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code.	2011-11-15 22:50:37 +00:00
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MC	ARM assembly parsing for register range syntax for VLD/VST register lists.	2011-11-15 23:19:15 +00:00
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Transforms	Refactor capture tracking (which already had a couple flags for whether returns	2011-11-14 22:49:42 +00:00
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