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054ce2fa8a
VPlan-native path Context: Patch Series #2 for outer loop vectorization support in LV using VPlan. (RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). Patch series #2 checks that inner loops are still trivially lock-step among all vector elements. Non-loop branches are blindly assumed as divergent. Changes here implement VPlan based predication algorithm to compute predicates for blocks that need predication. Predicates are computed for the VPLoop region in reverse post order. A block's predicate is computed as OR of the masks of all incoming edges. The mask for an incoming edge is computed as AND of predecessor block's predicate and either predecessor's Condition bit or NOT(Condition bit) depending on whether the edge from predecessor block to the current block is true or false edge. Reviewers: fhahn, rengolin, hsaito, dcaballe Reviewed By: fhahn Patch by Satish Guggilla, thanks! Differential Revision: https://reviews.llvm.org/D53349 llvm-svn: 351990
231 lines
9.3 KiB
C++
231 lines
9.3 KiB
C++
//===- llvm/unittests/Transforms/Vectorize/VPlanPredicatorTest.cpp -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "../lib/Transforms/Vectorize/VPlanPredicator.h"
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#include "VPlanTestBase.h"
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#include "gtest/gtest.h"
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namespace llvm {
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namespace {
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class VPlanPredicatorTest : public VPlanTestBase {};
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TEST_F(VPlanPredicatorTest, BasicPredicatorTest) {
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const char *ModuleString =
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"@arr = common global [8 x [8 x i64]] "
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"zeroinitializer, align 16\n"
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"@arr2 = common global [8 x [8 x i64]] "
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"zeroinitializer, align 16\n"
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"@arr3 = common global [8 x [8 x i64]] "
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"zeroinitializer, align 16\n"
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"define void @f(i64 %n1) {\n"
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"entry:\n"
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" br label %for.cond1.preheader\n"
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"for.cond1.preheader: \n"
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" %i1.029 = phi i64 [ 0, %entry ], [ %inc14, %for.inc13 ]\n"
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" br label %for.body3\n"
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"for.body3: \n"
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" %i2.028 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.inc ]\n"
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" %arrayidx4 = getelementptr inbounds [8 x [8 x i64]], [8 x [8 x i64]]* "
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"@arr, i64 0, i64 %i2.028, i64 %i1.029\n"
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" %0 = load i64, i64* %arrayidx4, align 8\n"
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" %cmp5 = icmp ugt i64 %0, 10\n"
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" br i1 %cmp5, label %if.then, label %for.inc\n"
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"if.then: \n"
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" %arrayidx7 = getelementptr inbounds [8 x [8 x i64]], [8 x [8 x i64]]* "
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"@arr2, i64 0, i64 %i2.028, i64 %i1.029\n"
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" %1 = load i64, i64* %arrayidx7, align 8\n"
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" %cmp8 = icmp ugt i64 %1, 100\n"
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" br i1 %cmp8, label %if.then9, label %for.inc\n"
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"if.then9: \n"
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" %add = add nuw nsw i64 %i2.028, %i1.029\n"
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" %arrayidx11 = getelementptr inbounds [8 x [8 x i64]], [8 x [8 x "
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"i64]]* @arr3, i64 0, i64 %i2.028, i64 %i1.029\n"
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" store i64 %add, i64* %arrayidx11, align 8\n"
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" br label %for.inc\n"
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"for.inc: \n"
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" %inc = add nuw nsw i64 %i2.028, 1\n"
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" %exitcond = icmp eq i64 %inc, 8\n"
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" br i1 %exitcond, label %for.inc13, label %for.body3\n"
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"for.inc13: \n"
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" %inc14 = add nuw nsw i64 %i1.029, 1\n"
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" %exitcond30 = icmp eq i64 %inc14, 8\n"
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" br i1 %exitcond30, label %for.end15, label %for.cond1.preheader\n"
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"for.end15: \n"
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" ret void\n"
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"}\n";
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Module &M = parseModule(ModuleString);
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Function *F = M.getFunction("f");
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BasicBlock *LoopHeader = F->getEntryBlock().getSingleSuccessor();
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auto Plan = buildHCFG(LoopHeader);
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VPRegionBlock *TopRegion = cast<VPRegionBlock>(Plan->getEntry());
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VPBlockBase *PH = TopRegion->getEntry();
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VPBlockBase *H = PH->getSingleSuccessor();
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VPBlockBase *InnerLoopH = H->getSingleSuccessor();
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VPBlockBase *OuterIf = InnerLoopH->getSuccessors()[0];
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VPBlockBase *InnerLoopLatch = InnerLoopH->getSuccessors()[1];
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VPBlockBase *InnerIf = OuterIf->getSuccessors()[0];
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VPValue *CBV1 = InnerLoopH->getCondBit();
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VPValue *CBV2 = OuterIf->getCondBit();
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// Apply predication.
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VPlanPredicator VPP(*Plan);
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VPP.predicate();
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VPBlockBase *InnerLoopLinSucc = InnerLoopH->getSingleSuccessor();
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VPBlockBase *OuterIfLinSucc = OuterIf->getSingleSuccessor();
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VPBlockBase *InnerIfLinSucc = InnerIf->getSingleSuccessor();
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VPValue *OuterIfPred = OuterIf->getPredicate();
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VPInstruction *InnerAnd =
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cast<VPInstruction>(InnerIf->getEntryBasicBlock()->begin());
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VPValue *InnerIfPred = InnerIf->getPredicate();
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// Test block predicates
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EXPECT_NE(nullptr, CBV1);
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EXPECT_NE(nullptr, CBV2);
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EXPECT_NE(nullptr, InnerAnd);
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EXPECT_EQ(CBV1, OuterIfPred);
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EXPECT_EQ(InnerAnd->getOpcode(), Instruction::And);
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EXPECT_EQ(InnerAnd->getOperand(0), CBV1);
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EXPECT_EQ(InnerAnd->getOperand(1), CBV2);
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EXPECT_EQ(InnerIfPred, InnerAnd);
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// Test Linearization
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EXPECT_EQ(InnerLoopLinSucc, OuterIf);
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EXPECT_EQ(OuterIfLinSucc, InnerIf);
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EXPECT_EQ(InnerIfLinSucc, InnerLoopLatch);
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}
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// Test generation of Not and Or during predication.
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TEST_F(VPlanPredicatorTest, PredicatorNegOrTest) {
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const char *ModuleString =
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"@arr = common global [100 x [100 x i32]] zeroinitializer, align 16\n"
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"@arr2 = common global [100 x [100 x i32]] zeroinitializer, align 16\n"
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"@arr3 = common global [100 x [100 x i32]] zeroinitializer, align 16\n"
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"define void @foo() {\n"
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"entry:\n"
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" br label %for.cond1.preheader\n"
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"for.cond1.preheader: \n"
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" %indvars.iv42 = phi i64 [ 0, %entry ], [ %indvars.iv.next43, "
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"%for.inc22 ]\n"
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" br label %for.body3\n"
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"for.body3: \n"
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" %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ "
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"%indvars.iv.next, %if.end21 ]\n"
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" %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 "
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"x i32]]* @arr, i64 0, i64 %indvars.iv, i64 %indvars.iv42\n"
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" %0 = load i32, i32* %arrayidx5, align 4\n"
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" %cmp6 = icmp slt i32 %0, 100\n"
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" br i1 %cmp6, label %if.then, label %if.end21\n"
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"if.then: \n"
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" %cmp7 = icmp sgt i32 %0, 10\n"
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" br i1 %cmp7, label %if.then8, label %if.else\n"
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"if.then8: \n"
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" %add = add nsw i32 %0, 10\n"
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" %arrayidx12 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 "
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"x i32]]* @arr2, i64 0, i64 %indvars.iv, i64 %indvars.iv42\n"
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" store i32 %add, i32* %arrayidx12, align 4\n"
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" br label %if.end\n"
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"if.else: \n"
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" %sub = add nsw i32 %0, -10\n"
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" %arrayidx16 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 "
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"x i32]]* @arr3, i64 0, i64 %indvars.iv, i64 %indvars.iv42\n"
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" store i32 %sub, i32* %arrayidx16, align 4\n"
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" br label %if.end\n"
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"if.end: \n"
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" store i32 222, i32* %arrayidx5, align 4\n"
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" br label %if.end21\n"
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"if.end21: \n"
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" %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1\n"
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" %exitcond = icmp eq i64 %indvars.iv.next, 100\n"
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" br i1 %exitcond, label %for.inc22, label %for.body3\n"
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"for.inc22: \n"
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" %indvars.iv.next43 = add nuw nsw i64 %indvars.iv42, 1\n"
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" %exitcond44 = icmp eq i64 %indvars.iv.next43, 100\n"
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" br i1 %exitcond44, label %for.end24, label %for.cond1.preheader\n"
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"for.end24: \n"
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" ret void\n"
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"}\n";
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Module &M = parseModule(ModuleString);
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Function *F = M.getFunction("foo");
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BasicBlock *LoopHeader = F->getEntryBlock().getSingleSuccessor();
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auto Plan = buildHCFG(LoopHeader);
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VPRegionBlock *TopRegion = cast<VPRegionBlock>(Plan->getEntry());
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VPBlockBase *PH = TopRegion->getEntry();
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VPBlockBase *H = PH->getSingleSuccessor();
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VPBlockBase *OuterIfCmpBlk = H->getSingleSuccessor();
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VPBlockBase *InnerIfCmpBlk = OuterIfCmpBlk->getSuccessors()[0];
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VPBlockBase *InnerIfTSucc = InnerIfCmpBlk->getSuccessors()[0];
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VPBlockBase *InnerIfFSucc = InnerIfCmpBlk->getSuccessors()[1];
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VPBlockBase *TSuccSucc = InnerIfTSucc->getSingleSuccessor();
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VPBlockBase *FSuccSucc = InnerIfFSucc->getSingleSuccessor();
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VPValue *OuterCBV = OuterIfCmpBlk->getCondBit();
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VPValue *InnerCBV = InnerIfCmpBlk->getCondBit();
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// Apply predication.
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VPlanPredicator VPP(*Plan);
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VPP.predicate();
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VPInstruction *And =
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cast<VPInstruction>(InnerIfTSucc->getEntryBasicBlock()->begin());
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VPInstruction *Not =
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cast<VPInstruction>(InnerIfFSucc->getEntryBasicBlock()->begin());
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VPInstruction *NotAnd = cast<VPInstruction>(
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&*std::next(InnerIfFSucc->getEntryBasicBlock()->begin(), 1));
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VPInstruction *Or =
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cast<VPInstruction>(TSuccSucc->getEntryBasicBlock()->begin());
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// Test block predicates
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EXPECT_NE(nullptr, OuterCBV);
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EXPECT_NE(nullptr, InnerCBV);
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EXPECT_NE(nullptr, And);
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EXPECT_NE(nullptr, Not);
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EXPECT_NE(nullptr, NotAnd);
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EXPECT_EQ(And->getOpcode(), Instruction::And);
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EXPECT_EQ(NotAnd->getOpcode(), Instruction::And);
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EXPECT_EQ(Not->getOpcode(), VPInstruction::Not);
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EXPECT_EQ(And->getOperand(0), OuterCBV);
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EXPECT_EQ(And->getOperand(1), InnerCBV);
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EXPECT_EQ(Not->getOperand(0), InnerCBV);
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EXPECT_EQ(NotAnd->getOperand(0), OuterCBV);
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EXPECT_EQ(NotAnd->getOperand(1), Not);
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EXPECT_EQ(InnerIfTSucc->getPredicate(), And);
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EXPECT_EQ(InnerIfFSucc->getPredicate(), NotAnd);
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EXPECT_EQ(TSuccSucc, FSuccSucc);
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EXPECT_EQ(Or->getOpcode(), Instruction::Or);
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EXPECT_EQ(TSuccSucc->getPredicate(), Or);
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// Test operands of the Or - account for differences in predecessor block
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// ordering.
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VPInstruction *OrOp0Inst = cast<VPInstruction>(Or->getOperand(0));
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VPInstruction *OrOp1Inst = cast<VPInstruction>(Or->getOperand(1));
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bool ValidOrOperands = false;
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if (((OrOp0Inst == And) && (OrOp1Inst == NotAnd)) ||
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((OrOp0Inst == NotAnd) && (OrOp1Inst == And)))
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ValidOrOperands = true;
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EXPECT_TRUE(ValidOrOperands);
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}
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} // namespace
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} // namespace llvm
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