Akira Hatanaka 0934449dd8 Add support for floating point base register + offset register addressing mode ...

load and store instructions.

llvm-svn: 151611

2012-02-28 02:55:02 +00:00

..

Analysis

Duncan pointed out that if the alignment isn't explicitly specified, it defaults to the ABI alignment. Given that, make this code a bit more aggressive in such cases.

2012-02-27 23:16:46 +00:00

Archive

Avoid using an invalidated iterator.

2012-01-23 05:07:16 +00:00

AsmParser

Convert assert(0) to llvm_unreachable

2012-02-07 05:05:23 +00:00

Bitcode

Enable streaming of bitcode

2012-02-06 22:30:29 +00:00

CodeGen

Handle regmasks in MachineCSE.

2012-02-28 02:08:50 +00:00

DebugInfo

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

ExecutionEngine

EE/Interpreter/ExternalFunctions.cpp: Staticize lle_X_() entries. They can be mapped in FuncNames[] at the initialization.

2012-02-24 00:20:08 +00:00

Linker

Add back removed code. It still causes LLVM to miscompile. But not having it breaks other things.

2012-02-27 23:48:30 +00:00

MC

ARM BL/BLX instruction fixups should use relocations.

2012-02-27 21:36:23 +00:00

Object

[Object] Add {begin,end}_dynamic_symbols stubs and implementation for ELF.

2012-02-28 00:40:37 +00:00

Support

Fix undefined behavior.

2012-02-24 19:06:15 +00:00

TableGen

Add Foreach Loop

2012-02-22 16:09:41 +00:00

Target

Add support for floating point base register + offset register addressing mode

2012-02-28 02:55:02 +00:00

Transforms

Plog a memleak in GlobalOpt.

2012-02-27 12:48:24 +00:00

VMCore

Use the DT dominates function in the verifier.

2012-02-26 02:23:37 +00:00

CMakeLists.txt

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LLVMBuild.txt

LLVMBuild: Introduce a common section which currently has a list of the

2011-12-12 22:45:54 +00:00

Makefile

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