llvm-mirror/test/CodeGen
Eric Christopher 09a41e8939 Make the 'x' constraint work for AVX registers as well.
Fixes rdar://10614894

llvm-svn: 147704
2012-01-07 01:02:09 +00:00
..
ARM Enable aligned NEON spilling by default. 2012-01-06 22:19:37 +00:00
CBackend Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. 2011-11-27 06:54:59 +00:00
CellSPU
CPP
Generic Manually upgrade the test suite to specify the flag to cttz and ctlz. 2011-12-12 11:59:10 +00:00
Hexagon Hexagon: Fix a nasty order-of-initialization bug. 2011-12-16 19:08:59 +00:00
MBlaze
Mips Have getRegForInlineAsmConstraint return the correct register class when target 2012-01-04 02:45:01 +00:00
MSP430 Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. 2011-11-27 06:54:59 +00:00
PowerPC Cleanup stack/frame register define/kill states. This fixes two bugs: 2011-12-30 00:34:00 +00:00
PTX PTX: Continue to fix up the register mess. 2011-12-06 17:39:48 +00:00
SPARC Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since 2011-12-03 21:24:48 +00:00
Thumb Fix more places which should be checking for iOS, not darwin. 2012-01-04 01:55:04 +00:00
Thumb2 Enable aligned NEON spilling by default. 2012-01-06 22:19:37 +00:00
X86 Make the 'x' constraint work for AVX registers as well. 2012-01-07 01:02:09 +00:00
XCore FileCheck hygiene. 2012-01-05 00:43:34 +00:00