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8ed6f090ef
Changed tests which assumed that vectors are legalized by widening them. llvm-svn: 142152
38 lines
938 B
LLVM
38 lines
938 B
LLVM
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 > %t1
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; RUN: grep movzwl %t1 | count 2
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; RUN: grep movzbl %t1 | count 1
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; RUN: grep movd %t1 | count 4
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define <4 x i16> @a(i32* %x1) nounwind {
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%x2 = load i32* %x1
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%x3 = lshr i32 %x2, 1
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%x = trunc i32 %x3 to i16
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%r = insertelement <4 x i16> zeroinitializer, i16 %x, i32 0
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ret <4 x i16> %r
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}
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define <8 x i16> @b(i32* %x1) nounwind {
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%x2 = load i32* %x1
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%x3 = lshr i32 %x2, 1
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%x = trunc i32 %x3 to i16
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%r = insertelement <8 x i16> zeroinitializer, i16 %x, i32 0
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ret <8 x i16> %r
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}
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define <8 x i8> @c(i32* %x1) nounwind {
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%x2 = load i32* %x1
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%x3 = lshr i32 %x2, 1
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%x = trunc i32 %x3 to i8
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%r = insertelement <8 x i8> zeroinitializer, i8 %x, i32 0
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ret <8 x i8> %r
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}
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define <16 x i8> @d(i32* %x1) nounwind {
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%x2 = load i32* %x1
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%x3 = lshr i32 %x2, 1
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%x = trunc i32 %x3 to i8
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%r = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0
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ret <16 x i8> %r
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}
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