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0d35bd3ca9
llvm-mirror/lib/Target/SparcV8
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Brian Gaeke 0d35bd3ca9 Preliminary support for getting 64-bit integer constants into registers. 
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.

llvm-svn: 12732
2004-04-07 04:00:49 +00:00
..
DelaySlotFiller.cpp Prune unnecessary #includes 2004-04-06 23:25:07 +00:00
InstSelectSimple.cpp Preliminary support for getting 64-bit integer constants into registers. 2004-04-07 04:00:49 +00:00
Makefile Clean up rules 2004-02-28 19:43:40 +00:00
README.txt SparcV8 skeleton 2004-02-25 19:28:19 +00:00
SparcV8.h Add references to delay slot filler pass. 2004-04-06 23:21:24 +00:00
SparcV8.td Delete reference to "the Mach-O Runtime ABI". 2004-04-06 22:09:59 +00:00
SparcV8AsmPrinter.cpp First attempt at special-casing printing of [%reg + offset] for 2004-04-06 22:10:11 +00:00
SparcV8CodeEmitter.cpp SparcV8 skeleton 2004-02-25 19:28:19 +00:00
SparcV8InstrInfo_F2.td Tab completion is our friend. 2004-02-28 19:45:39 +00:00
SparcV8InstrInfo_F3.td Tab completion is our friend. 2004-02-28 19:45:39 +00:00
SparcV8InstrInfo.cpp Adjust to change in TII ctor arguments 2004-02-29 06:31:44 +00:00
SparcV8InstrInfo.h These two virtual methods are never called. 2004-02-29 05:59:33 +00:00
SparcV8InstrInfo.td Add load, store, and NOP instructions. 2004-04-02 20:53:37 +00:00
SparcV8JITInfo.h SparcV8 skeleton 2004-02-25 19:28:19 +00:00
SparcV8RegisterInfo.cpp First attempt at handling frame index elimination. 2004-04-06 22:10:22 +00:00
SparcV8RegisterInfo.h SparcV8 skeleton 2004-02-25 19:28:19 +00:00
SparcV8RegisterInfo.td Avoid allocating special registers a bit more robustly 2004-03-08 03:48:07 +00:00
SparcV8TargetMachine.cpp Add references to delay slot filler pass. 2004-04-06 23:21:24 +00:00
SparcV8TargetMachine.h TargetCacheInfo has been removed; its only uses were to propagate a constant 2004-03-01 06:43:29 +00:00

README.txt 

SparcV8 backend skeleton
------------------------

This directory will house a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  Watch this space for more news coming soon!

$Date$