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llvm-mirror/test/CodeGen
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Hal Finkel 2d02d8085a [PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation 
PPCISelDAGToDAG has a transformation that generates a rlwimi instruction from
an input pattern that looks like this:

  and(or(x, c1), c2)

but the associated logic does not work if there are bits that are 1 in c1 but 0
in c2 (these are normally canonicalized away, but that can't happen if the 'or'
has other users. Make sure we abort the transformation if such bits are
discovered.

Fixes PR24704.

llvm-svn: 246900
2015-09-05 00:02:59 +00:00
..
AArch64 Fix the testcase in r246790 2015-09-04 01:39:24 +00:00
AMDGPU Fix CHECK directives that weren't checking. 2015-08-31 21:10:35 +00:00
ARM [ARM] Add a test case for revision 243956. 2015-09-03 16:49:18 +00:00
BPF [bpf] rename triple names bpf_be -> bpfeb 2015-06-05 16:11:14 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Generic Distribute the weight on the edge from switch to default statement to edges generated in lowering switch. 2015-09-01 01:42:16 +00:00
Hexagon DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00
Inputs DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00
Mips Assign weights to edges to jump table / bit test header when lowering switch statement. 2015-08-26 23:15:32 +00:00
MIR DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00
MSP430 [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
NVPTX [NVPTX] Let NVPTX backend detect integer min and max patterns. 2015-08-26 23:22:02 +00:00
PowerPC [PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation 2015-09-05 00:02:59 +00:00
SPARC Fix CHECK directives that weren't checking. 2015-08-31 21:10:35 +00:00
SystemZ Make MergeConsecutiveStores look at other stores on same chain 2015-08-28 17:31:28 +00:00
Thumb DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00
Thumb2 Distribute the weight on the edge from switch to default statement to edges generated in lowering switch. 2015-09-01 01:42:16 +00:00
WebAssembly WebAssembly: generate load/store 2015-08-31 22:24:11 +00:00
WinEH [WinEH] Add llvm.eh.exceptionpointer intrinsic 2015-09-03 09:15:32 +00:00
X86 [X86][AVX] Test tidyup + regeneration. NFCI. 2015-09-04 19:47:56 +00:00
XCore DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00