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AsmParser
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Add unittests to {ARM | AArch64}TargetParser.
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2016-07-28 06:11:18 +00:00 |
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Disassembler
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InstPrinter
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MCTargetDesc
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[AArch64] Registering default MCInstrAnalysis
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2016-08-12 20:28:05 +00:00 |
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TargetInfo
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Utils
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AArch64.h
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64.td
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[AArch64] Add support for Samsung Exynos M2 (NFC).
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2016-08-01 18:39:45 +00:00 |
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AArch64A53Fix835769.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64A57FPLoadBalancing.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64AddressTypePromotion.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64AdvSIMDScalarPass.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64AsmPrinter.cpp
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AArch64BranchRelaxation.cpp
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AArch64: Assert on analyzeBranch failing
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2016-08-11 17:22:59 +00:00 |
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AArch64CallingConvention.h
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AArch64CallingConvention.td
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GlobalISel[AArch64]: support pointer types in argument lowering.
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2016-07-25 21:01:17 +00:00 |
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AArch64CallLowering.cpp
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GlobalISel: implement simple function calls on AArch64.
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2016-08-10 21:44:01 +00:00 |
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AArch64CallLowering.h
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Fixed VS2015 (Update 3) warning - differing const/volatile qualifiers for overridden function
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2016-08-11 12:19:43 +00:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64CollectLOH.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64ConditionalCompares.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64ConditionOptimizer.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64DeadRegisterDefinitionsPass.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64ExpandPseudoInsts.cpp
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[AArch64] Register AArch64LoadStoreOptimizer so it can be run by llc -run-pass. NFCI.
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2016-07-20 21:45:58 +00:00 |
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AArch64FastISel.cpp
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AArch64: properly calculate cmpxchg status in FastISel.
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2016-08-02 20:22:36 +00:00 |
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AArch64FrameLowering.cpp
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Move helpers into anonymous namespaces. NFC.
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2016-08-06 11:13:10 +00:00 |
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AArch64FrameLowering.h
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AArch64InstrAtomics.td
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AArch64: properly calculate cmpxchg status in FastISel.
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2016-08-02 20:22:36 +00:00 |
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AArch64InstrFormats.td
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AArch64InstrInfo.cpp
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[AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.
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2016-08-12 15:26:00 +00:00 |
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AArch64InstrInfo.h
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[AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.
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2016-08-12 15:26:00 +00:00 |
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AArch64InstrInfo.td
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AArch64InstructionSelector.cpp
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[AArch64][GlobalISel] Select G_XOR.
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2016-07-29 16:56:25 +00:00 |
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AArch64InstructionSelector.h
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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AArch64ISelDAGToDAG.cpp
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Use the range variant of transform instead of unpacking begin/end
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2016-08-12 04:32:42 +00:00 |
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AArch64ISelLowering.cpp
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Use the range variant of find_if instead of unpacking begin/end
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2016-08-12 00:18:03 +00:00 |
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AArch64ISelLowering.h
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GlobalISel: implement simple function calls on AArch64.
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2016-08-10 21:44:01 +00:00 |
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AArch64LoadStoreOptimizer.cpp
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[AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired loads/stores.
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2016-08-12 20:39:51 +00:00 |
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AArch64MachineFunctionInfo.h
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[AArch64] Mark various *Info classes as 'final'. NFC.
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2016-07-27 14:31:46 +00:00 |
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AArch64MachineLegalizer.cpp
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GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR.
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2016-08-04 21:39:49 +00:00 |
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AArch64MachineLegalizer.h
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Fix include case. NFC.
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2016-07-22 20:15:19 +00:00 |
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AArch64MCInstLower.cpp
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AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PromoteConstant.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64RedundantCopyElimination.cpp
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Use the range variant of transform instead of unpacking begin/end
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2016-08-12 04:32:45 +00:00 |
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AArch64RegisterBankInfo.cpp
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GlobalISel: implement low-level type with just size & vector lanes.
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2016-07-20 19:09:30 +00:00 |
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AArch64RegisterBankInfo.h
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[AArch64] Mark various *Info classes as 'final'. NFC.
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2016-07-27 14:31:46 +00:00 |
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AArch64RegisterInfo.cpp
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MachineFunction: Return reference for getFrameInfo(); NFC
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2016-07-28 18:40:00 +00:00 |
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AArch64RegisterInfo.h
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[AArch64] Mark various *Info classes as 'final'. NFC.
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2016-07-27 14:31:46 +00:00 |
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AArch64RegisterInfo.td
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AArch64SchedA53.td
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AArch64SchedA57.td
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AArch64SchedA57WriteRes.td
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AArch64SchedCyclone.td
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AArch64SchedKryo.td
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AArch64SchedKryoDetails.td
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AArch64SchedM1.td
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AArch64Schedule.td
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AArch64SchedVulcan.td
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AArch64SelectionDAGInfo.cpp
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AArch64SelectionDAGInfo.h
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AArch64StorePairSuppress.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64Subtarget.cpp
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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AArch64Subtarget.h
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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AArch64SystemOperands.td
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AArch64TargetMachine.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
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AArch64TargetTransformInfo.h
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CMakeLists.txt
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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LLVMBuild.txt
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