Chad Rosier 143f33dc92 [avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads. ... This results in things such as vmovups 16(%rdi), %xmm0 vinsertf128 $1, %xmm0, %ymm0, %ymm0 to be combined to vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 rdar://11076953 llvm-svn: 153092		2012-03-20 17:08:51 +00:00
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CodeGen	[avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.	2012-03-20 17:08:51 +00:00
DebugInfo	llvm/test/DebugInfo: Move two tests to DebugInfo/X86. They are X86-dependent.	2012-03-19 16:16:03 +00:00
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MC	The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.	2012-03-20 15:54:56 +00:00
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Transforms	Factor out the multiply analysis code in ComputeMaskedBits and apply it to the	2012-03-18 23:28:48 +00:00
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