Clement Courbet 147c7c78fd [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.
This allows later passes (in particular InstCombine) to optimize more
cases.

One that's important to us is `memcmp(p, q, constant) < 0` and memcmp(p, q, constant) > 0.

llvm-svn: 364412
2019-06-26 11:50:18 +00:00

295 lines
15 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=powerpc64le-unknown-gnu-linux -data-layout="e-m:e-i64:64-n32:64" | FileCheck %s
; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=powerpc64-unknown-gnu-linux -data-layout="E-m:e-i64:64-n32:64" | FileCheck %s --check-prefix=CHECK-BE
define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-NEXT: br label [[LOADBB:%.*]]
; CHECK: res_block:
; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1:%.*]] ]
; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ]
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1
; CHECK-NEXT: br label [[ENDBLOCK:%.*]]
; CHECK: loadbb:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*
; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*
; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]]
; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]]
; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]])
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]]
; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; CHECK: loadbb1:
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8
; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64*
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8
; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i64*
; CHECK-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]]
; CHECK-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP14]]
; CHECK-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]])
; CHECK-NEXT: [[TMP18]] = call i64 @llvm.bswap.i64(i64 [[TMP16]])
; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[TMP17]], [[TMP18]]
; CHECK-NEXT: br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; CHECK: endblock:
; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ]
; CHECK-NEXT: ret i32 [[PHI_RES]]
;
; CHECK-BE-LABEL: @test1(
; CHECK-BE-NEXT: entry:
; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-BE-NEXT: br label [[LOADBB:%.*]]
; CHECK-BE: res_block:
; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1:%.*]] ]
; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP14:%.*]], [[LOADBB1]] ]
; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1
; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]]
; CHECK-BE: loadbb:
; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*
; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*
; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]]
; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]]
; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; CHECK-BE: loadbb1:
; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8
; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i64*
; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8
; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64*
; CHECK-BE-NEXT: [[TMP13]] = load i64, i64* [[TMP10]]
; CHECK-BE-NEXT: [[TMP14]] = load i64, i64* [[TMP12]]
; CHECK-BE-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP13]], [[TMP14]]
; CHECK-BE-NEXT: br i1 [[TMP15]], label [[ENDBLOCK]], label [[RES_BLOCK]]
; CHECK-BE: endblock:
; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ]
; CHECK-BE-NEXT: ret i32 [[PHI_RES]]
;
entry:
%0 = bitcast i32* %buffer1 to i8*
%1 = bitcast i32* %buffer2 to i8*
%call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16)
ret i32 %call
}
declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1
define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32*
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]
; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]]
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])
; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP5]])
; CHECK-NEXT: [[TMP8:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]]
; CHECK-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]]
; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32
; CHECK-NEXT: [[TMP11:%.*]] = zext i1 [[TMP9]] to i32
; CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[TMP10]], [[TMP11]]
; CHECK-NEXT: ret i32 [[TMP12]]
;
; CHECK-BE-LABEL: @test2(
; CHECK-BE-NEXT: entry:
; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-BE-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32*
; CHECK-BE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-BE-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]
; CHECK-BE-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]]
; CHECK-BE-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP4]], [[TMP5]]
; CHECK-BE-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]
; CHECK-BE-NEXT: [[TMP8:%.*]] = zext i1 [[TMP6]] to i32
; CHECK-BE-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32
; CHECK-BE-NEXT: [[TMP10:%.*]] = sub i32 [[TMP8]], [[TMP9]]
; CHECK-BE-NEXT: ret i32 [[TMP10]]
;
entry:
%0 = bitcast i32* %buffer1 to i8*
%1 = bitcast i32* %buffer2 to i8*
%call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4)
ret i32 %call
}
define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-NEXT: br label [[LOADBB:%.*]]
; CHECK: res_block:
; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1:%.*]] ], [ [[TMP30:%.*]], [[LOADBB2:%.*]] ]
; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP20:%.*]], [[LOADBB1]] ], [ [[TMP31:%.*]], [[LOADBB2]] ]
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1
; CHECK-NEXT: br label [[ENDBLOCK:%.*]]
; CHECK: loadbb:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*
; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*
; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]]
; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]]
; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]])
; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]])
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]]
; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; CHECK: loadbb1:
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8
; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8
; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]]
; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP14]]
; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]])
; CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP16]])
; CHECK-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64
; CHECK-NEXT: [[TMP20]] = zext i32 [[TMP18]] to i64
; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[TMP19]], [[TMP20]]
; CHECK-NEXT: br i1 [[TMP21]], label [[LOADBB2]], label [[RES_BLOCK]]
; CHECK: loadbb2:
; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12
; CHECK-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i16*
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12
; CHECK-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i16*
; CHECK-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP23]]
; CHECK-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP25]]
; CHECK-NEXT: [[TMP28:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP26]])
; CHECK-NEXT: [[TMP29:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP27]])
; CHECK-NEXT: [[TMP30]] = zext i16 [[TMP28]] to i64
; CHECK-NEXT: [[TMP31]] = zext i16 [[TMP29]] to i64
; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i64 [[TMP30]], [[TMP31]]
; CHECK-NEXT: br i1 [[TMP32]], label [[LOADBB3:%.*]], label [[RES_BLOCK]]
; CHECK: loadbb3:
; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14
; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14
; CHECK-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP33]]
; CHECK-NEXT: [[TMP36:%.*]] = load i8, i8* [[TMP34]]
; CHECK-NEXT: [[TMP37:%.*]] = zext i8 [[TMP35]] to i32
; CHECK-NEXT: [[TMP38:%.*]] = zext i8 [[TMP36]] to i32
; CHECK-NEXT: [[TMP39:%.*]] = sub i32 [[TMP37]], [[TMP38]]
; CHECK-NEXT: br label [[ENDBLOCK]]
; CHECK: endblock:
; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP39]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ]
; CHECK-NEXT: ret i32 [[PHI_RES]]
;
; CHECK-BE-LABEL: @test3(
; CHECK-BE-NEXT: entry:
; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-BE-NEXT: br label [[LOADBB:%.*]]
; CHECK-BE: res_block:
; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP15:%.*]], [[LOADBB1:%.*]] ], [ [[TMP24:%.*]], [[LOADBB2:%.*]] ]
; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ], [ [[TMP25:%.*]], [[LOADBB2]] ]
; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1
; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]]
; CHECK-BE: loadbb:
; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64*
; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64*
; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]]
; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]]
; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]]
; CHECK-BE: loadbb1:
; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8
; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8
; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*
; CHECK-BE-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]]
; CHECK-BE-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]]
; CHECK-BE-NEXT: [[TMP15]] = zext i32 [[TMP13]] to i64
; CHECK-BE-NEXT: [[TMP16]] = zext i32 [[TMP14]] to i64
; CHECK-BE-NEXT: [[TMP17:%.*]] = icmp eq i64 [[TMP15]], [[TMP16]]
; CHECK-BE-NEXT: br i1 [[TMP17]], label [[LOADBB2]], label [[RES_BLOCK]]
; CHECK-BE: loadbb2:
; CHECK-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12
; CHECK-BE-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i16*
; CHECK-BE-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12
; CHECK-BE-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
; CHECK-BE-NEXT: [[TMP22:%.*]] = load i16, i16* [[TMP19]]
; CHECK-BE-NEXT: [[TMP23:%.*]] = load i16, i16* [[TMP21]]
; CHECK-BE-NEXT: [[TMP24]] = zext i16 [[TMP22]] to i64
; CHECK-BE-NEXT: [[TMP25]] = zext i16 [[TMP23]] to i64
; CHECK-BE-NEXT: [[TMP26:%.*]] = icmp eq i64 [[TMP24]], [[TMP25]]
; CHECK-BE-NEXT: br i1 [[TMP26]], label [[LOADBB3:%.*]], label [[RES_BLOCK]]
; CHECK-BE: loadbb3:
; CHECK-BE-NEXT: [[TMP27:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14
; CHECK-BE-NEXT: [[TMP28:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14
; CHECK-BE-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP27]]
; CHECK-BE-NEXT: [[TMP30:%.*]] = load i8, i8* [[TMP28]]
; CHECK-BE-NEXT: [[TMP31:%.*]] = zext i8 [[TMP29]] to i32
; CHECK-BE-NEXT: [[TMP32:%.*]] = zext i8 [[TMP30]] to i32
; CHECK-BE-NEXT: [[TMP33:%.*]] = sub i32 [[TMP31]], [[TMP32]]
; CHECK-BE-NEXT: br label [[ENDBLOCK]]
; CHECK-BE: endblock:
; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP33]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ]
; CHECK-BE-NEXT: ret i32 [[PHI_RES]]
;
entry:
%0 = bitcast i32* %buffer1 to i8*
%1 = bitcast i32* %buffer2 to i8*
%call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15)
ret i32 %call
}
define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65)
; CHECK-NEXT: ret i32 [[CALL]]
;
; CHECK-BE-LABEL: @test4(
; CHECK-BE-NEXT: entry:
; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65)
; CHECK-BE-NEXT: ret i32 [[CALL]]
;
entry:
%0 = bitcast i32* %buffer1 to i8*
%1 = bitcast i32* %buffer2 to i8*
%call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65)
ret i32 %call
}
define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64
; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]])
; CHECK-NEXT: ret i32 [[CALL]]
;
; CHECK-BE-LABEL: @test5(
; CHECK-BE-NEXT: entry:
; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
; CHECK-BE-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64
; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]])
; CHECK-BE-NEXT: ret i32 [[CALL]]
;
entry:
%0 = bitcast i32* %buffer1 to i8*
%1 = bitcast i32* %buffer2 to i8*
%conv = sext i32 %SIZE to i64
%call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv)
ret i32 %call
}