Hal Finkel 15265edebe MFTB on PPC64 should really be encoded using MFSPR.
The MFTB instruction itself is being phased out, and its functionality
is provided by MFSPR. According to the ISA docs, using MFSPR works on all known
chips except for the 601 (which did not have a timebase register anyway)
and the POWER3.

Thanks to Adhemerval Zanella for pointing this out!

llvm-svn: 161346
2012-08-06 21:21:44 +00:00
2012-07-19 00:23:13 +00:00
2012-07-23 08:51:15 +00:00
2012-08-04 09:52:39 +00:00
2012-08-04 10:31:40 +00:00
2012-05-02 21:25:32 +00:00
2012-06-19 23:47:58 +00:00
2012-04-03 23:09:22 +00:00
2012-07-11 17:34:12 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

Please see the HTML documentation provided in docs/index.html for further
assistance with LLVM.

If you're writing a package for LLVM, see docs/Packaging.html for our
suggestions.


Description
Fork of llvm with experimental commits and workarounds for RPCS3
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