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5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
27 lines
1.0 KiB
LLVM
27 lines
1.0 KiB
LLVM
; RUN: llvm-as < %s | llvm-dis > %t
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; RUN: llvm-as < %t | llvm-dis > %t2
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; RUN: diff %t %t2
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; ModuleID = '<stdin>'
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "powerpc-apple-darwin8"
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@ld = external global ppc_fp128 ; <ppc_fp128*> [#uses=1]
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@d = global double 4.050000e+00, align 8 ; <double*> [#uses=1]
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@f = global float 0x4010333340000000 ; <float*> [#uses=1]
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define i32 @foo() {
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entry:
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%retval = alloca i32, align 4 ; <i32*> [#uses=1]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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%tmp = load float* @f ; <float> [#uses=1]
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%tmp1 = fpext float %tmp to double ; <double> [#uses=1]
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%tmp2 = load double* @d ; <double> [#uses=1]
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%tmp3 = fmul double %tmp1, %tmp2 ; <double> [#uses=1]
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%tmp4 = fpext double %tmp3 to ppc_fp128 ; <ppc_fp128> [#uses=1]
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store ppc_fp128 %tmp4, ppc_fp128* @ld
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br label %return
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return: ; preds = %entry
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%retval4 = load i32* %retval ; <i32> [#uses=1]
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ret i32 %retval4
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}
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