Preston Gurd 1683865eea This patch addresses a problem with the Post RA scheduler generating an ... incorrect instruction sequence due to it not being aware that an inline assembly instruction may reference memory. This patch fixes the problem by causing the scheduler to always assume that any inline assembly code instruction could access memory. This is necessary because the internal representation of the inline instruction does not include any information about memory accesses. This should fix PR13504. llvm-svn: 166929		2012-10-29 15:01:23 +00:00
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ARM	[code size][ARM] Emit regular call instructions instead of the move, branch sequence	2012-10-27 01:10:17 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	Implement brind operator for mips16.	2012-10-28 23:08:07 +00:00
MSP430	Fix fallout from RegInfo => FrameLowering refactoring on MSP430.	2012-10-17 17:37:11 +00:00
NVPTX	Add llvm.fabs intrinsic.	2012-05-28 21:48:37 +00:00
PowerPC	This patch adds alignment information for long double to the 64-bit PowerPC	2012-10-29 14:59:36 +00:00
SPARC	Fix broken tests.	2012-10-02 15:49:34 +00:00
Thumb	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	This patch addresses a problem with the Post RA scheduler generating an	2012-10-29 15:01:23 +00:00
XCore	Fix pattern for MKMSK instruction.	2012-06-13 17:59:12 +00:00