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c3b59a654a
This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction. Differential Revision: https://reviews.llvm.org/D48918 llvm-svn: 336418
13 lines
572 B
ArmAsm
13 lines
572 B
ArmAsm
// RUN: llvm-mc -triple arm -mattr=+v8.4a -show-encoding < %s | FileCheck %s --check-prefix=CHECK-A32
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// RUN: llvm-mc -triple thumb -mattr=+v8.4a -show-encoding < %s | FileCheck %s --check-prefix=CHECK-T32
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// RUN: not llvm-mc -triple arm -mattr=-v8.4a -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-V84
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tsb csync
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//CHECK-A32: tsb csync @ encoding: [0x12,0xf0,0x20,0xe3]
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//CHECK-T32: tsb csync @ encoding: [0xaf,0xf3,0x12,0x80]
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//CHECK-NO-V84: error: invalid instruction
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//CHECK-NO-V84: tsb csync
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//CHECK-NO-V84: ^
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