Chris Lattner 19343b85fd Add support for targets (like Alpha) that have terminator instructions which
use virtual registers.  We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's.  This fixes a problem on a testcase
Andrew sent me.

llvm-svn: 25083
2006-01-04 07:12:21 +00:00
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