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Fork of llvm with experimental commits and workarounds for RPCS3
1a69820d6d
an argument, so that we can distinguish instructions with the same register classes but different numbers of registers (e.g., vld3 and vld4). Fix some of the non-pseudo NEON ld/st instruction itineraries to reflect the number of registers loaded or stored, not just the opcode name. llvm-svn: 113854 |
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