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a5dd1a7062
Summary: dsbh and dshd are not available on Mips32r2. No codegen test changes required since expansion of i64 prevented the use of these instructions anyway. Depends on D3690 Reviewers: vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3692 llvm-svn: 208542
11 lines
399 B
ArmAsm
11 lines
399 B
ArmAsm
# Instructions that are invalid
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#
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# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding \
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# RUN: -mcpu=mips32r2 2>%t1
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# RUN: FileCheck %s < %t1
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.set noat
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dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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