llvm-mirror

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History

Aditya Nandakumar dbed654493 [GISel]: Verify COPIES involving generic registers.

Add verification for copies involving generic registers if they are
compatible - ie if it is a generic copy, then the types are the
same, and if a COPY b/w generic and target virtual register, then
the sizes should be the same. Only checks if there are no sub registers
involved for now.

https://reviews.llvm.org/D37775

llvm-svn: 324696

2018-02-09 01:27:23 +00:00

AArch64

[GISel]: Verify COPIES involving generic registers.

2018-02-09 01:27:23 +00:00

AMDGPU

[GISel]: Verify COPIES involving generic registers.

2018-02-09 01:27:23 +00:00

ARM

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

Generic

[RegAllocFast] Add the proper initialize method to use the .mir infrastructure

2017-07-07 19:25:42 +00:00

Hexagon

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

Mips

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

NVPTX

[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.

2018-01-10 00:56:48 +00:00

PowerPC

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

X86

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

README

Add README describing the intention of test/CodeGen/MIR

2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.