Evan Cheng ed09135349 Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends ... was lowering them to sext / uxt + mul instructions. Unfortunately the optimization passes may hoist the extensions out of the loop and separate them. When that happens, the long multiplication instructions can be broken into several scalar instructions, causing significant performance issue. Note the vmla and vmls intrinsics are not added back. Frontend will codegen them as intrinsics vmull* + add / sub. Also note the isel optimizations for catching mul + sext / zext are not changed either. First part of rdar://8832507, rdar://9203134 llvm-svn: 128502		2011-03-29 23:06:19 +00:00
..
2006-12-11-Cast-ConstExpr.ll
2009-06-11-FirstClassAggregateConstant.ll	Don't remove aggregate-typed module level constants before encoding functions	2009-06-12 05:20:12 +00:00
AutoUpgradeGlobals.ll	Auto-upgrade the magic ".llvm.eh.catch.all.value" global to	2010-09-10 18:51:56 +00:00
AutoUpgradeGlobals.ll.bc	Auto-upgrade the magic ".llvm.eh.catch.all.value" global to	2010-09-10 18:51:56 +00:00
AutoUpgradeIntrinsics.ll
AutoUpgradeIntrinsics.ll.bc
dg.exp
extractelement.ll	Change tests from "opt %s" to "opt < %s" so that opt doesn't see the	2009-09-11 18:01:28 +00:00
flags.ll	Fix the bitcode reader to deserialize nuw/nsw/etc. bits properly in the case	2010-01-25 21:55:39 +00:00
memcpy.ll	reapply 'reject forward references to functions whose type don't match'	2010-04-20 04:49:11 +00:00
metadata-2.ll	Remove obsolete -f flags.	2009-08-25 15:38:29 +00:00
metadata.ll	Remove obsolete -f flags.	2009-08-25 15:38:29 +00:00
neon-intrinsics.ll	Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends	2011-03-29 23:06:19 +00:00
neon-intrinsics.ll.bc	Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the	2010-09-03 01:35:08 +00:00
null-type.ll	Testcase for PR8494 (invalid bitcode crashing the bitcode reader).	2010-10-28 15:57:30 +00:00
null-type.ll.bc	Testcase for PR8494 (invalid bitcode crashing the bitcode reader).	2010-10-28 15:57:30 +00:00
sse2_loadl_pd.ll	Autoupgrade x86.sse2.loadh.pd and x86.sse2.loadl.pd.	2008-05-24 00:08:39 +00:00
sse2_loadl_pd.ll.bc	Autoupgrade x86.sse2.loadh.pd and x86.sse2.loadl.pd.	2008-05-24 00:08:39 +00:00
sse2_movl_dq.ll
sse2_movl_dq.ll.bc
sse2_movs_d.ll	Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.	2008-05-24 02:14:05 +00:00
sse2_movs_d.ll.bc	Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.	2008-05-24 02:14:05 +00:00
sse2_punpck_qdq.ll	Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq.	2008-05-24 02:56:30 +00:00
sse2_punpck_qdq.ll.bc	Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq.	2008-05-24 02:56:30 +00:00
sse2_shuf_pd.ll	Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.	2008-05-24 02:14:05 +00:00
sse2_shuf_pd.ll.bc	Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.	2008-05-24 02:14:05 +00:00
sse2_unpck_pd.ll	Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.	2008-05-24 02:14:05 +00:00
sse2_unpck_pd.ll.bc	Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.	2008-05-24 02:14:05 +00:00
sse41_pmulld.ll	add newlines at the end of files.	2010-04-07 22:53:17 +00:00
sse41_pmulld.ll.bc	Remove the pmulld intrinsic and autoupdate it as a vector multiply.	2010-03-30 18:49:01 +00:00
ssse3_palignr.ll	Remove the palignr intrinsics now that we lower them to vector shuffles,	2010-04-20 00:59:54 +00:00
ssse3_palignr.ll.bc	Massive rewrite of MMX:	2010-09-30 23:57:10 +00:00