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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
25 lines
956 B
LLVM
25 lines
956 B
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=cond-b-short
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@i = global i32 0, align 4
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@j = common global i32 0, align 4
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; Function Attrs: nounwind optsize
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define i32 @main() #0 {
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entry:
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%0 = load i32, i32* @i, align 4
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%cmp = icmp eq i32 %0, 0
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br i1 %cmp, label %if.then, label %if.end
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; cond-b-short: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
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if.then: ; preds = %entry
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store i32 10, i32* @j, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret i32 0
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}
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attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
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