Evan Cheng 309650d7ba It's ok to spill a tGPR register as long as it's still allocated a low register. ...

llvm-svn: 78893

2009-08-13 05:40:51 +00:00

..

Alpha

Make promotion in operation legalization for SETCC work correctly.

2009-07-17 05:16:04 +00:00

ARM

Generate Neon VTBL and VTBX instructions from the corresponding intrinsics.

2009-08-12 20:51:55 +00:00

Blackfin

Rebuild RegScavenger::DistanceMap each time it is needed.

2009-08-11 06:25:12 +00:00

CBackend

Fix an erroneous check for isFNeg; the FNeg case is handled

2009-06-04 23:43:29 +00:00

CellSPU

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16 06:58:29 +00:00

CPP

Fix code emission for conditional branches.

2009-05-04 19:10:38 +00:00

Generic

Remove the IA-64 backend.

2009-07-24 00:30:09 +00:00

Mips

Pass target triple string in to TargetMachine constructor.

2009-08-03 04:03:51 +00:00

MSP430

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

PIC16

this passes.

2009-08-06 03:55:49 +00:00

PowerPC

add nounwind

2009-08-12 05:44:03 +00:00

SPARC

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

SystemZ

Various AsmWriter output cleanups. Use WriteAsOperand instead of

2009-08-13 01:36:44 +00:00

Thumb

It's ok to spill a tGPR register as long as it's still allocated a low register.

2009-08-13 05:40:51 +00:00

Thumb2

Remove an Darwin assembler workaround.

2009-08-12 01:56:42 +00:00

X86

Change MCSectionELF to represent a section semantically instead of

2009-08-13 05:07:35 +00:00

XCore

Add extra SEXT pattern.

2009-08-02 22:45:24 +00:00