Bruno Cardoso Lopes bb491bd56c Begin to support some vector operations for AVX 256-bit intructions. The long ...

term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.

llvm-svn: 110897

2010-08-12 02:06:36 +00:00

..

Alpha

PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually

2010-08-01 21:13:28 +00:00

ARM

Consider this code snippet:

2010-08-11 08:43:16 +00:00

Blackfin

Remove TargetInstrInfo::copyRegToReg entirely.

2010-07-11 17:01:17 +00:00

CBackend

…

CellSPU

Have SPU handle halfvec stores aligned by 8 bytes.

2010-08-09 16:33:00 +00:00

CPP

…

Generic

Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself

2010-07-27 18:02:18 +00:00

MBlaze

…

Mips

Fix PR7174, a couple o Mips fixes:

2010-07-20 08:37:04 +00:00

MSP430

…

PIC16

…

PowerPC

PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR.

2010-08-02 00:18:19 +00:00

SPARC

…

SystemZ

…

Thumb

Fix test and re-enable it.

2010-08-11 17:25:51 +00:00

Thumb2

fix silly typo

2010-08-11 17:32:46 +00:00

X86

Begin to support some vector operations for AVX 256-bit intructions. The long

2010-08-12 02:06:36 +00:00

XCore

…