llvm-mirror/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
Puyan Lotfi 5ae700de13 [MIR-Canon] Skip the first N vreg names lazily.
This consolidates the vreg skip code into one function (SkipVRegs()).
SkipVRegs() now knows if it should skip as if it is the first initialization or
subsequent skips.

The first skip is also done the first time createVirtualRegister is called by
the cursor instead of by the cursor's constructor. This prevents verifier
errors on machine functions that have no vregs (where the verifier will
complain that there are vregs when the function uses none).

Differential Revision: https://reviews.llvm.org/D62717

llvm-svn: 362195
2019-05-31 06:02:38 +00:00

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# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser can parse multiple register machine
# operands before '='.
# This tests that a MIR file with no vregs does not get altered by mir-canon.
# RUN: llc -mtriple=aarch64 -o - -run-pass mir-canonicalizer -verify-machineinstrs %s
--- |
declare void @foo()
define void @trivial_fp_func() {
entry:
call void @foo()
ret void
}
...
---
name: trivial_fp_func
body: |
bb.0.entry:
liveins: $lr, $fp, $lr, $fp
$sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2
$fp = frame-setup ADDXri $sp, 0, 0
BL @foo, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
; CHECK: $sp, $fp, $lr = LDPXpost $sp, 2
$sp, $fp, $lr = LDPXpost $sp, 2
RET_ReallyLR
...