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95869a202b
llvm-svn: 163974
191 lines
6.6 KiB
C++
191 lines
6.6 KiB
C++
//===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a virtual register map. This maps virtual registers to
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// physical registers and virtual registers to stack slots. It is created and
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// updated by a register allocator and then used by a machine code rewriter that
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// adds spill code and rewrites virtual into physical register references.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_VIRTREGMAP_H
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#define LLVM_CODEGEN_VIRTREGMAP_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/ADT/IndexedMap.h"
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namespace llvm {
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class MachineInstr;
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class MachineFunction;
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class MachineRegisterInfo;
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class TargetInstrInfo;
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class raw_ostream;
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class SlotIndexes;
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class VirtRegMap : public MachineFunctionPass {
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public:
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enum {
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NO_PHYS_REG = 0,
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NO_STACK_SLOT = (1L << 30)-1,
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MAX_STACK_SLOT = (1L << 18)-1
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};
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private:
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MachineRegisterInfo *MRI;
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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MachineFunction *MF;
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/// Virt2PhysMap - This is a virtual to physical register
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/// mapping. Each virtual register is required to have an entry in
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/// it; even spilled virtual registers (the register mapped to a
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/// spilled register is the temporary used to load it from the
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/// stack).
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IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
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/// Virt2StackSlotMap - This is virtual register to stack slot
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/// mapping. Each spilled virtual register has an entry in it
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/// which corresponds to the stack slot this register is spilled
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/// at.
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IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
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/// Virt2SplitMap - This is virtual register to splitted virtual register
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/// mapping.
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IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
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/// createSpillSlot - Allocate a spill slot for RC from MFI.
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unsigned createSpillSlot(const TargetRegisterClass *RC);
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VirtRegMap(const VirtRegMap&) LLVM_DELETED_FUNCTION;
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void operator=(const VirtRegMap&) LLVM_DELETED_FUNCTION;
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public:
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static char ID;
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VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
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Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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MachineFunction &getMachineFunction() const {
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assert(MF && "getMachineFunction called before runOnMachineFunction");
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return *MF;
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}
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MachineRegisterInfo &getRegInfo() const { return *MRI; }
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const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
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void grow();
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/// @brief returns true if the specified virtual register is
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/// mapped to a physical register
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bool hasPhys(unsigned virtReg) const {
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return getPhys(virtReg) != NO_PHYS_REG;
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}
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/// @brief returns the physical register mapped to the specified
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/// virtual register
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unsigned getPhys(unsigned virtReg) const {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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return Virt2PhysMap[virtReg];
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}
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/// @brief creates a mapping for the specified virtual register to
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/// the specified physical register
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void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
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TargetRegisterInfo::isPhysicalRegister(physReg));
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assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
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"attempt to assign physical register to already mapped "
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"virtual register");
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Virt2PhysMap[virtReg] = physReg;
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}
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/// @brief clears the specified virtual register's, physical
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/// register mapping
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void clearVirt(unsigned virtReg) {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
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"attempt to clear a not assigned virtual register");
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Virt2PhysMap[virtReg] = NO_PHYS_REG;
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}
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/// @brief clears all virtual to physical register mappings
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void clearAllVirt() {
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Virt2PhysMap.clear();
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grow();
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}
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/// @brief returns the register allocation preference.
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unsigned getRegAllocPref(unsigned virtReg);
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/// @brief returns true if VirtReg is assigned to its preferred physreg.
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bool hasPreferredPhys(unsigned VirtReg) {
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return getPhys(VirtReg) == getRegAllocPref(VirtReg);
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}
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/// @brief records virtReg is a split live interval from SReg.
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void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
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Virt2SplitMap[virtReg] = SReg;
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}
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/// @brief returns the live interval virtReg is split from.
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unsigned getPreSplitReg(unsigned virtReg) const {
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return Virt2SplitMap[virtReg];
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}
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/// getOriginal - Return the original virtual register that VirtReg descends
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/// from through splitting.
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/// A register that was not created by splitting is its own original.
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/// This operation is idempotent.
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unsigned getOriginal(unsigned VirtReg) const {
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unsigned Orig = getPreSplitReg(VirtReg);
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return Orig ? Orig : VirtReg;
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}
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/// @brief returns true if the specified virtual register is not
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/// mapped to a stack slot or rematerialized.
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bool isAssignedReg(unsigned virtReg) const {
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if (getStackSlot(virtReg) == NO_STACK_SLOT)
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return true;
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// Split register can be assigned a physical register as well as a
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// stack slot or remat id.
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return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
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}
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/// @brief returns the stack slot mapped to the specified virtual
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/// register
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int getStackSlot(unsigned virtReg) const {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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return Virt2StackSlotMap[virtReg];
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}
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/// @brief create a mapping for the specifed virtual register to
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/// the next available stack slot
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int assignVirt2StackSlot(unsigned virtReg);
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/// @brief create a mapping for the specified virtual register to
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/// the specified stack slot
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void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
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void print(raw_ostream &OS, const Module* M = 0) const;
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void dump() const;
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};
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inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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VRM.print(OS);
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return OS;
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}
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} // End llvm namespace
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#endif
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