Evan Cheng 443ae1d494 Cross RC coalescing is now on by default. ...

llvm-svn: 76519

2009-07-21 00:22:59 +00:00

..

Alpha

Make promotion in operation legalization for SETCC work correctly.

2009-07-17 05:16:04 +00:00

ARM

Forgot this test earlier.

2009-07-20 21:46:42 +00:00

CBackend

Fix an erroneous check for isFNeg; the FNeg case is handled

2009-06-04 23:43:29 +00:00

CellSPU

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16 06:58:29 +00:00

CPP

Fix code emission for conditional branches.

2009-05-04 19:10:38 +00:00

Generic

remove tests for removed intrinsics.

2009-07-12 21:30:06 +00:00

IA64

Add the private linkage.

2009-01-15 20:18:42 +00:00

Mips

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

MSP430

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

PIC16

Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes

2009-07-20 22:02:59 +00:00

PowerPC

Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.

2009-07-16 20:58:34 +00:00

SPARC

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

SystemZ

Enable cross register class coalescing.

2009-07-18 02:10:10 +00:00

Thumb

Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes

2009-07-20 22:02:59 +00:00

Thumb2

Emit cross regclass register moves for thumb2.

2009-07-16 23:26:06 +00:00

X86

Cross RC coalescing is now on by default.

2009-07-21 00:22:59 +00:00

XCore

Combine an unaligned store of unaligned load into a memmove.

2009-07-16 12:50:48 +00:00