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82 lines
3.4 KiB
LLVM
82 lines
3.4 KiB
LLVM
; Tests to make sure intrinsics are automatically upgraded.
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; RUN: llvm-as < %s | llvm-dis | not grep {i32 @llvm\\.ct}
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; RUN: llvm-as < %s | llvm-dis | \
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; RUN: not grep {llvm\\.part\\.set\\.i\[0-9\]*\\.i\[0-9\]*\\.i\[0-9\]*}
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; RUN: llvm-as < %s | llvm-dis | \
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; RUN: not grep {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*}
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; RUN: llvm-as < %s | llvm-dis | \
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; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*}
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; RUN: llvm-as < %s | llvm-dis | \
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; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {2 x i32> | count 6
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declare i32 @llvm.ctpop.i28(i28 %val)
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declare i32 @llvm.cttz.i29(i29 %val)
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declare i32 @llvm.ctlz.i30(i30 %val)
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define i32 @test_ct(i32 %A) {
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%c1 = call i32 @llvm.ctpop.i28(i28 1234)
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%c2 = call i32 @llvm.cttz.i29(i29 2345)
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%c3 = call i32 @llvm.ctlz.i30(i30 3456)
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%r1 = add i32 %c1, %c2
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%r2 = add i32 %r1, %c3
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ret i32 %r2
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}
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declare i32 @llvm.part.set.i32.i32.i32(i32 %x, i32 %rep, i32 %hi, i32 %lo)
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declare i16 @llvm.part.set.i16.i16.i16(i16 %x, i16 %rep, i32 %hi, i32 %lo)
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define i32 @test_part_set(i32 %A, i16 %B) {
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%a = call i32 @llvm.part.set.i32.i32.i32(i32 %A, i32 27, i32 8, i32 0)
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%b = call i16 @llvm.part.set.i16.i16.i16(i16 %B, i16 27, i32 8, i32 0)
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%c = zext i16 %b to i32
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%d = add i32 %a, %c
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ret i32 %d
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}
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declare i32 @llvm.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
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declare i16 @llvm.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
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define i32 @test_part_select(i32 %A, i16 %B) {
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%a = call i32 @llvm.part.select.i32.i32(i32 %A, i32 8, i32 0)
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%b = call i16 @llvm.part.select.i16.i16(i16 %B, i32 8, i32 0)
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%c = zext i16 %b to i32
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%d = add i32 %a, %c
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ret i32 %d
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}
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declare i32 @llvm.bswap.i32.i32(i32 %x)
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declare i16 @llvm.bswap.i16.i16(i16 %x)
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define i32 @test_bswap(i32 %A, i16 %B) {
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%a = call i32 @llvm.bswap.i32.i32(i32 %A)
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%b = call i16 @llvm.bswap.i16.i16(i16 %B)
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%c = zext i16 %b to i32
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%d = add i32 %a, %c
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ret i32 %d
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}
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declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <2 x i32>) nounwind readnone
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declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <2 x i32>) nounwind readnone
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declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <2 x i32>) nounwind readnone
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define void @sh16(<4 x i16> %A, <2 x i32> %B) {
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%r1 = call <4 x i16> @llvm.x86.mmx.psra.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
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%r2 = call <4 x i16> @llvm.x86.mmx.psll.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
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%r3 = call <4 x i16> @llvm.x86.mmx.psrl.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
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ret void
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}
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declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone
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declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <2 x i32>) nounwind readnone
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declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <2 x i32>) nounwind readnone
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define void @sh32(<2 x i32> %A, <2 x i32> %B) {
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%r1 = call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
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%r2 = call <2 x i32> @llvm.x86.mmx.psll.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
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%r3 = call <2 x i32> @llvm.x86.mmx.psrl.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
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ret void
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}
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declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <2 x i32>) nounwind readnone
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declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <2 x i32>) nounwind readnone
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define void @sh64(<1 x i64> %A, <2 x i32> %B) {
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%r1 = call <1 x i64> @llvm.x86.mmx.psll.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0]
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%r2 = call <1 x i64> @llvm.x86.mmx.psrl.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0]
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ret void
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}
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