llvm-mirror/test/MC/Disassembler
Matheus Almeida 468163ea32 [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).
Summary: These instructions are available in ISAs >= mips32/mips64. For mips32r6/mips64r6, jr.hb has a new encoding format.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4019

llvm-svn: 210654
2014-06-11 15:05:56 +00:00
..
AArch64 Condition codes AL and NV are invalid in the aliases that use 2014-06-10 13:11:35 +00:00
ARM Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Mips [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
PowerPC Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
X86 Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00