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a8eb1f20c0
This change follows up defaults for GCC and Clang, so LLVM does not differ from them. While number of the test files are touched with this change, they all keep the old (expected) behaviour with the explicit option: "-relocation-model=pic" The tests that have not been touched are insensitive to relocation model. Differential Revision: http://reviews.llvm.org/D17995 llvm-svn: 265949
132 lines
4.9 KiB
LLVM
132 lines
4.9 KiB
LLVM
; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s
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%0 = type { i8, i16, i32, i64, double, i32, [4 x i8] }
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%struct.S1 = type { i8, i16, i32, i64, double, i32 }
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%struct.S2 = type { [4 x i32] }
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%struct.S3 = type { i8 }
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@f1.s1 = internal unnamed_addr constant %0 { i8 1, i16 2, i32 3, i64 4, double 5.000000e+00, i32 6, [4 x i8] undef }, align 8
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@f1.s2 = internal unnamed_addr constant %struct.S2 { [4 x i32] [i32 7, i32 8, i32 9, i32 10] }, align 4
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define void @f1() nounwind {
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entry:
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; CHECK-LABEL: f1:
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; CHECK-DAG: lw $[[R1:[0-9]+]], %got(f1.s1)
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; CHECK-DAG: addiu $[[R0:[0-9]+]], $[[R1]], %lo(f1.s1)
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; CHECK-DAG: lw $[[R7:[0-9]+]], 12($[[R0]])
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; CHECK-DAG: lw $[[R3:[0-9]+]], 16($[[R0]])
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; CHECK-DAG: lw $[[R4:[0-9]+]], 20($[[R0]])
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; CHECK-DAG: lw $[[R5:[0-9]+]], 24($[[R0]])
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; CHECK-DAG: lw $[[R6:[0-9]+]], 28($[[R0]])
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; CHECK-DAG: sw $[[R6]], 36($sp)
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; CHECK-DAG: sw $[[R5]], 32($sp)
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; CHECK-DAG: sw $[[R4]], 28($sp)
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; CHECK-DAG: sw $[[R3]], 24($sp)
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; CHECK-DAG: sw $[[R7]], 20($sp)
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; CHECK-DAG: lw $[[R2:[0-9]+]], 8($[[R0]])
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; CHECK-DAG: sw $[[R2]], 16($sp)
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; CHECK-DAG: lw $6, %lo(f1.s1)($[[R1]])
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; CHECK-DAG: lw $7, 4($[[R0]])
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%agg.tmp10 = alloca %struct.S3, align 4
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call void @callee1(float 2.000000e+01, %struct.S1* byval bitcast (%0* @f1.s1 to %struct.S1*)) nounwind
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call void @callee2(%struct.S2* byval @f1.s2) nounwind
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%tmp11 = getelementptr inbounds %struct.S3, %struct.S3* %agg.tmp10, i32 0, i32 0
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store i8 11, i8* %tmp11, align 4
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call void @callee3(float 2.100000e+01, %struct.S3* byval %agg.tmp10, %struct.S1* byval bitcast (%0* @f1.s1 to %struct.S1*)) nounwind
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ret void
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}
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declare void @callee1(float, %struct.S1* byval)
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declare void @callee2(%struct.S2* byval)
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declare void @callee3(float, %struct.S3* byval, %struct.S1* byval)
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define void @f2(float %f, %struct.S1* nocapture byval %s1) nounwind {
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entry:
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; CHECK: addiu $sp, $sp, -48
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; CHECK: sw $7, 60($sp)
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; CHECK: sw $6, 56($sp)
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; CHECK: lw $4, 80($sp)
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; CHECK: ldc1 $f[[F0:[0-9]+]], 72($sp)
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; CHECK: lw $[[R3:[0-9]+]], 64($sp)
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; CHECK: lw $[[R4:[0-9]+]], 68($sp)
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; CHECK: lw $[[R2:[0-9]+]], 60($sp)
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; CHECK: lh $[[R1:[0-9]+]], 58($sp)
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; CHECK: lb $[[R0:[0-9]+]], 56($sp)
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; CHECK: sw $[[R0]], 32($sp)
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; CHECK: sw $[[R1]], 28($sp)
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; CHECK: sw $[[R2]], 24($sp)
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; CHECK: sw $[[R4]], 20($sp)
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; CHECK: sw $[[R3]], 16($sp)
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; CHECK: mfc1 $6, $f[[F0]]
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%i2 = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 5
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%tmp = load i32, i32* %i2, align 4
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%d = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 4
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%tmp1 = load double, double* %d, align 8
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%ll = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 3
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%tmp2 = load i64, i64* %ll, align 8
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%i = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 2
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%tmp3 = load i32, i32* %i, align 4
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%s = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 1
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%tmp4 = load i16, i16* %s, align 2
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%c = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 0
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%tmp5 = load i8, i8* %c, align 1
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tail call void @callee4(i32 %tmp, double %tmp1, i64 %tmp2, i32 %tmp3, i16 signext %tmp4, i8 signext %tmp5, float %f) nounwind
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ret void
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}
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declare void @callee4(i32, double, i64, i32, i16 signext, i8 signext, float)
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define void @f3(%struct.S2* nocapture byval %s2) nounwind {
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entry:
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; CHECK: addiu $sp, $sp, -48
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; CHECK: sw $7, 60($sp)
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; CHECK: sw $6, 56($sp)
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; CHECK: sw $5, 52($sp)
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; CHECK: sw $4, 48($sp)
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; CHECK: lw $4, 48($sp)
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; CHECK: lw $[[R0:[0-9]+]], 60($sp)
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; CHECK: sw $[[R0]], 24($sp)
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%arrayidx = getelementptr inbounds %struct.S2, %struct.S2* %s2, i32 0, i32 0, i32 0
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%tmp = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds %struct.S2, %struct.S2* %s2, i32 0, i32 0, i32 3
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%tmp3 = load i32, i32* %arrayidx2, align 4
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tail call void @callee4(i32 %tmp, double 2.000000e+00, i64 3, i32 %tmp3, i16 signext 4, i8 signext 5, float 6.000000e+00) nounwind
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ret void
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}
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define void @f4(float %f, %struct.S3* nocapture byval %s3, %struct.S1* nocapture byval %s1) nounwind {
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entry:
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; CHECK: addiu $sp, $sp, -48
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; CHECK: sw $7, 60($sp)
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; CHECK: sw $6, 56($sp)
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; CHECK: sw $5, 52($sp)
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; CHECK: lw $4, 60($sp)
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; CHECK: lw $[[R1:[0-9]+]], 80($sp)
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; CHECK: lb $[[R0:[0-9]+]], 52($sp)
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; CHECK: sw $[[R0]], 32($sp)
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; CHECK: sw $[[R1]], 24($sp)
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%i = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 2
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%tmp = load i32, i32* %i, align 4
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%i2 = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 5
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%tmp1 = load i32, i32* %i2, align 4
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%c = getelementptr inbounds %struct.S3, %struct.S3* %s3, i32 0, i32 0
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%tmp2 = load i8, i8* %c, align 1
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tail call void @callee4(i32 %tmp, double 2.000000e+00, i64 3, i32 %tmp1, i16 signext 4, i8 signext %tmp2, float 6.000000e+00) nounwind
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ret void
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}
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%struct.S4 = type { [4 x i32] }
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define void @f5(i64 %a0, %struct.S4* nocapture byval %a1) nounwind {
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entry:
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tail call void @f6(%struct.S4* byval %a1, i64 %a0) nounwind
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ret void
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}
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declare void @f6(%struct.S4* nocapture byval, i64)
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