llvm-mirror/test/CodeGen/X86/prefetch.ll
Yunzhong Gao 23e948dd2f Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar,
bulldozer and piledriver. Support for the instruction itself seems to have
already been added in r178040.

Differential Revision: http://llvm-reviews.chandlerc.com/D1933

llvm-svn: 192828
2013-10-16 19:04:11 +00:00

28 lines
1.0 KiB
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW
; RUN: llc < %s -march=x86 -mcpu=slm | FileCheck %s -check-prefix=SLM
; RUN: llc < %s -march=x86 -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHW
; RUN: llc < %s -march=x86 -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=NOPRFCHW
; rdar://10538297
define void @t(i8* %ptr) nounwind {
entry:
; CHECK: prefetcht2
; CHECK: prefetcht1
; CHECK: prefetcht0
; CHECK: prefetchnta
; PRFCHW: prefetchw
; NOPRFCHW-NOT: prefetchw
; SLM: prefetchw
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 )
ret void
}
declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind