mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-02 00:16:25 +00:00
e7d64b577c
This is a 1-line patch (with a TODO for AVX because that will affect even more regression tests) that lets us substitute the appropriate 64-bit store for the float/double/int domains. It's not clear to me exactly what the difference is between the 0xD6 (MOVPQI2QImr) and 0x7E (MOVSDto64mr) opcodes, but this is apparently the right choice. Differential Revision: http://reviews.llvm.org/D8691 llvm-svn: 235014
13 lines
329 B
LLVM
13 lines
329 B
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s
|
|
; CHECK: movl
|
|
; CHECK: movq
|
|
|
|
; bitcast a i64 to v2i32
|
|
define void @convert(<2 x i32>* %dst.addr, i64 %src) nounwind {
|
|
entry:
|
|
%conv = bitcast i64 %src to <2 x i32>
|
|
%xor = xor <2 x i32> %conv, < i32 255, i32 32767 >
|
|
store <2 x i32> %xor, <2 x i32>* %dst.addr
|
|
ret void
|
|
}
|