llvm-mirror/lib/Target/Alpha
Chris Lattner edf1e280a2 rejigger the world so that EmitInstruction prints the \n at
the end of the instruction instead of expecting the caller to
do it.  This currently causes the asm-verbose instruction 
comments to be on the next line.

llvm-svn: 95178
2010-02-03 01:09:55 +00:00
..
AsmPrinter rejigger the world so that EmitInstruction prints the \n at 2010-02-03 01:09:55 +00:00
TargetInfo
Alpha.h eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
Alpha.td
AlphaBranchSelector.cpp
AlphaCallingConv.td
AlphaCodeEmitter.cpp add a definition for ID. 2010-02-02 21:49:29 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp Revert 95130. 2010-02-02 23:55:14 +00:00
AlphaISelLowering.h Revert 95130. 2010-02-02 23:55:14 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp Eliminate SetDirective, and replace it with HasSetDirective. 2010-01-26 20:40:54 +00:00
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
AlphaTargetMachine.h eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
CMakeLists.txt
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html