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e08e0dcfcc
create a new DAG node to represent the new shift to keep the DAG consistent, even though it'll almost always be folded into the address. If a user of the resulting address has multiple uses, the nodes may get revisited by a later MatchAddress call, in which case DAG inconsistencies do matter. This fixes PR2849. llvm-svn: 57465
39 lines
1.5 KiB
LLVM
39 lines
1.5 KiB
LLVM
; RUN: llvm-as < %s | llc
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; PR2849
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-unknown-linux-gnu"
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%struct.BaseBoundPtrs = type { i8*, i8* }
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%struct.HashEntry = type { %struct.BaseBoundPtrs }
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%struct.NODE = type { i8, i8, %struct.anon }
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%struct.anon = type { %struct.xlist }
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%struct.xlist = type { %struct.NODE*, %struct.NODE* }
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%struct.xvect = type { %struct.NODE** }
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@hash_table_begin = external global %struct.HashEntry*
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define void @obshow() {
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entry:
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%tmp = load %struct.HashEntry** @hash_table_begin, align 8
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br i1 false, label %xlygetvalue.exit, label %xlygetvalue.exit
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xlygetvalue.exit:
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%storemerge.in.i = phi %struct.NODE** [ null, %entry ], [ null, %entry ]
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%storemerge.i = load %struct.NODE** %storemerge.in.i
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%tmp1 = ptrtoint %struct.NODE** %storemerge.in.i to i64
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%tmp2 = lshr i64 %tmp1, 3
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%tmp3 = and i64 %tmp2, 2147483647
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%tmp4 = getelementptr %struct.HashEntry* %tmp, i64 %tmp3, i32 0, i32 1
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%tmp7 = load i8** %tmp4, align 8
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%tmp8 = getelementptr %struct.NODE* %storemerge.i, i64 0, i32 2
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%tmp9 = bitcast %struct.anon* %tmp8 to %struct.NODE***
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%tmp11 = load %struct.NODE*** %tmp9, align 8
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%tmp12 = ptrtoint %struct.NODE** %tmp11 to i64
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%tmp13 = lshr i64 %tmp12, 3
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%tmp14 = and i64 %tmp13, 2147483647
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%tmp15 = getelementptr %struct.HashEntry* %tmp, i64 %tmp14, i32 0, i32 1
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call fastcc void @xlprint(i8** %tmp4, i8* %tmp7, i8** %tmp15)
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ret void
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}
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declare fastcc void @xlprint(i8**, i8*, i8**)
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