llvm-mirror/test/CodeGen/ARM
Evan Cheng c7ce7e2ac3 Given a pair of floating point load and store, if there are no other uses of
the load, then it may be legal to transform the load and store to integer
load and store of the same width.

This is done if the target specified the transformation as profitable. e.g.
On arm, this can transform:
vldr.32 s0, []
vstr.32 s0, []

to

ldr r12, []
str r12, []

rdar://8944252

llvm-svn: 124708
2011-02-02 01:06:55 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-26-RegScavengerAssert.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-jumptoentry.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
2007-05-23-BadPreIndexedStore.ll
2007-05-31-RegScavengerInfiniteLoop.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-14-CoalescerBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-12-RegScavengerAssert.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll
2009-08-21-PostRAKill3.ll
2009-08-21-PostRAKill.ll
2009-08-23-linkerprivate.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll
2009-08-31-TwoRegShuffle.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll
2009-10-02-NEONSubregsBug.ll
2009-10-21-InvalidFNeg.ll
2009-10-27-double-align.ll
2009-10-30.ll
2009-11-01-NeonMoves.ll
2009-11-02-NegativeLane.ll
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll
2010-03-04-eabi-fp-spill.ll
2010-03-04-stm-undef-addr.ll
2010-03-18-ldm-rtrn.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
2010-04-07-DbgValueOtherTargets.ll If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
2010-04-09-NeonSelect.ll
2010-04-13-v2f64SplitArg.ll
2010-04-14-SplitVector.ll
2010-04-15-ScavengerDebugValue.ll
2010-05-14-IllegalType.ll
2010-05-17-FastAllocCrash.ll
2010-05-18-LocalAllocCrash.ll
2010-05-18-PostIndexBug.ll
2010-05-19-Shuffles.ll
2010-05-20-NEONSpillCrash.ll
2010-05-21-BuildVector.ll
2010-06-11-vmovdrr-bitcast.ll
2010-06-21-LdStMultipleBug.ll
2010-06-21-nondarwin-tc.ll
2010-06-25-Thumb2ITInvalidIterator.ll
2010-06-29-PartialRedefFastAlloc.ll
2010-06-29-SubregImpDefs.ll
2010-07-26-GlobalMerge.ll
2010-08-04-EHCrash.ll
2010-09-21-OptCmpBug.ll
2010-09-29-mc-asm-header-test.ll
2010-10-19-mc-elf-objheader.ll
2010-10-25-ifcvt-ldm.ll
2010-11-15-SpillEarlyClobber.ll
2010-11-29-PrologueBug.ll Mark Darwin call instructions as using "r7" to prevent the frame-register 2010-11-29 22:43:27 +00:00
2010-11-30-reloc-movt.ll Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. 2011-01-17 08:03:18 +00:00
2010-12-07-PEIBug.ll Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal 2010-12-07 23:08:38 +00:00
2010-12-08-tpsoft.ll ARM/MC/ELF TPsoft is now a proper pseudo inst. 2010-12-08 23:14:44 +00:00
2010-12-13-reloc-pic.ll Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. 2011-01-17 08:03:18 +00:00
2010-12-15-elf-lcomm.ll Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. 2011-01-17 08:03:18 +00:00
2010-12-17-LocalStackSlotCrash.ll During local stack slot allocation, the materializeFrameBaseRegister function 2010-12-17 23:09:14 +00:00
2011-01-19-MergedGlobalDbg.ll Fix debug info for merged global. 2011-01-20 00:02:16 +00:00
addrmode.ll
aliases.ll
align.ll
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll
arm-and-tst-peephole.ll
arm-asm.ll
arm-frameaddr.ll
arm-negative-stride.ll
arm-returnaddr.ll
armv4.ll
bfc.ll
bfi.ll bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663 2010-12-14 03:22:07 +00:00
bfx.ll
bic.ll
bits.ll
bswap-inline-asm.ll Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. 2011-01-08 01:24:27 +00:00
bx_fold.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
call_nolink.ll
call-tc.ll Don't merge restore with tail call instruction. 2011-01-25 01:28:33 +00:00
call.ll
carry.ll
clz.ll
code-placement.ll
compare-call.ll
constants.ll
crash-O0.ll
crash.ll
cse-libcalls.ll
ctors_dtors.ll
ctz.ll
dg.exp
div.ll
dyn-stackalloc.ll
extloadi1.ll
fabss.ll
fadds.ll
fast-isel-crash.ll Add a testcase for my last checkin. 2011-01-27 06:01:17 +00:00
fast-isel-static.ll Don't handle -arm-long-calls in fast isel for now. 2010-12-15 23:47:29 +00:00
fast-isel.ll
fcopysign.ll
fdivs.ll
fixunsdfdi.ll
flag-crash.ll
fmacs.ll
fmdrr-fmrrd.ll
fmscs.ll
fmuls.ll
fnegs.ll Convert -enable-sched-cycles and -enable-sched-hazard to -disable 2011-01-21 05:51:33 +00:00
fnmacs.ll
fnmscs.ll Convert -enable-sched-cycles and -enable-sched-hazard to -disable 2011-01-21 05:51:33 +00:00
fnmul.ll
fnmuls.ll
formal.ll
fp16.ll
fp_convert.ll
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp-opt.ll Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. 2010-12-23 22:45:49 +00:00
fpcmp.ll
fpconsts.ll Convert -enable-sched-cycles and -enable-sched-hazard to -disable 2011-01-21 05:51:33 +00:00
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll
fptoint.ll
fsubs.ll
global-merge.ll
globals.ll
hardfloat_neon.ll
hello.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
iabs.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
ifcvt7.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
ifcvt8.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
ifcvt9.ll
ifcvt10.ll
ifcvt11.ll
illegal-vector-bitcast.ll
imm.ll
indirectbr.ll
inlineasm2.ll
inlineasm3.ll
inlineasm-imm-arm.ll
inlineasm.ll
insn-sched1.ll
ispositive.ll
large-stack.ll
ldm.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd.ll
ldst-f32-2-i32.ll Given a pair of floating point load and store, if there are no other uses of 2011-02-02 01:06:55 +00:00
load-global.ll Last round of fixes for movw + movt global address codegen. 2011-01-21 18:55:51 +00:00
load.ll
long_shift.ll
long-setcc.ll
long.ll
lsr-code-insertion.ll PR8921: LDM/POP do not support interworking prior to v5t. 2011-01-06 19:24:41 +00:00
lsr-on-unrolled-loops.ll
lsr-scale-addr-mode.ll
machine-cse-cmp.ll
machine-licm.ll Last round of fixes for movw + movt global address codegen. 2011-01-21 18:55:51 +00:00
mem.ll
memcpy-inline.ll
memfunc.ll
mls.ll
movt-movw-global.ll
movt.ll
mul_const.ll
mul.ll
mulhi.ll
mult-alt-generic-arm.ll
mvn.ll
neon_arith1.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll
pack.ll
phi.ll move this test into the ARM test so that it is only run when the arm backend 2010-12-19 02:58:14 +00:00
pr3502.ll
prefetch.ll
private.ll
reg_sequence.ll Making use of VFP / NEON floating point multiply-accumulate / subtraction is 2010-12-05 22:04:16 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll
sbfx.ll
section.ll
select_xform.ll
select-imm.ll
select.ll
shifter_operand.ll
smul.ll
spill-q.ll Add ARM patterns to match EXTRACT_SUBVECTOR nodes. 2011-01-07 04:59:04 +00:00
stack-frame.ll
stm.ll
str_post.ll
str_pre-2.ll Update the test 2011-01-01 20:57:26 +00:00
str_pre.ll
str_trunc.ll
sub.ll
sxt_rot.ll
t2-imm.ll
tail-opts.ll Last round of fixes for movw + movt global address codegen. 2011-01-21 18:55:51 +00:00
thread_pointer.ll
thumb1-varalloc.ll Even if we don't have 7 bytes of stack space we may need to save and 2011-01-11 00:16:04 +00:00
tls1.ll
tls2.ll
tls3.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll
umulo-32.ll If we can, lower the multiply part of a umulo/smulo call to a libcall 2011-01-20 00:29:24 +00:00
unaligned_load_store.ll Convert -enable-sched-cycles and -enable-sched-hazard to -disable 2011-01-21 05:51:33 +00:00
unord.ll
uxt_rot.ll
uxtb.ll
va_arg.ll
vaba.ll
vabd.ll
vabs.ll
vadd.ll
vargs_align.ll
vargs.ll
vbits.ll Add missing colon. 2010-11-29 22:39:38 +00:00
vbsl.ll
vceq.ll
vcge.ll Fix result type of Neon floating-point comparisons against zero. 2010-12-18 00:04:33 +00:00
vcgt.ll Enable support for precise scheduling of the instruction selection 2011-01-21 06:19:05 +00:00
vcnt.ll
vcombine.ll Add testcases for PR8411 (vget_low and vget_high implemented as shuffles). 2011-01-07 06:44:14 +00:00
vcvt.ll Add Neon VCVT instructions for f32 <-> f16 conversions. 2010-12-15 22:14:12 +00:00
vdup.ll Add float patterns for Neon vld1-lane/dup and vst1-lane operations. 2010-12-10 22:13:32 +00:00
vector-DAGCombine.ll Add ARM-specific DAG combining to cast i64 vector element load/stores to f64. 2010-12-21 06:43:19 +00:00
vext.ll Lower some BUILD_VECTORS using VEXT+shuffle. 2011-01-07 21:37:30 +00:00
vfcmp.ll
vfp.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll
vld2.ll
vld3.ll
vld4.ll
vlddup.ll Add float patterns for Neon vld1-lane/dup and vst1-lane operations. 2010-12-10 22:13:32 +00:00
vldlane.ll Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation. 2010-12-17 01:21:12 +00:00
vminmax.ll
vmla.ll
vmls.ll
vmov.ll
vmul.ll
vneg.ll
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
vst2.ll
vst3.ll
vst4.ll
vstlane.ll Add float patterns for Neon vld1-lane/dup and vst1-lane operations. 2010-12-10 22:13:32 +00:00
vsub.ll
vtbl.ll
vtrn.ll
vuzp.ll
vzip.ll
weak2.ll
weak.ll