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63ebf9bb19
This removes a quadratic behavior in assert-enabled builds.
GVN propagates the equivalence from a condition into the blocks guarded by the
condition. E.g. for 'if (a == 7) { ... }', 'a' will be replaced in the block
with 7. It does this by replacing all the uses of 'a' that are dominated by
the true edge.
For a switch with N cases and U uses of the value, this will mean N * U calls
to 'dominates'. Asserting isSingleEdge in 'dominates' make this N^2 * U
because this function checks for the uniqueness of the edge. I.e. traverses
each edge between the SwitchInst's block and the cases.
The change removes the assert and makes 'dominates' works correctly in the
presence of non-unique edges.
This brings build time down by an order of magnitude for an input that has
~10k cases in a switch statement.
Differential Revision: https://reviews.llvm.org/D33584
llvm-svn: 304721
312 lines
11 KiB
C++
312 lines
11 KiB
C++
//===- llvm/unittests/IR/DominatorTreeTest.cpp - Constants unit tests -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/PostDominators.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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/// Build the dominator tree for the function and run the Test.
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static void
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runWithDomTree(Module &M, StringRef FuncName,
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function_ref<void(Function &F, DominatorTree *DT,
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DominatorTreeBase<BasicBlock> *PDT)>
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Test) {
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auto *F = M.getFunction(FuncName);
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ASSERT_NE(F, nullptr) << "Could not find " << FuncName;
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// Compute the dominator tree for the function.
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DominatorTree DT(*F);
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DominatorTreeBase<BasicBlock> PDT(/*isPostDom*/ true);
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PDT.recalculate(*F);
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Test(*F, &DT, &PDT);
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}
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static std::unique_ptr<Module> makeLLVMModule(LLVMContext &Context,
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StringRef ModuleStr) {
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SMDiagnostic Err;
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std::unique_ptr<Module> M = parseAssemblyString(ModuleStr, Err, Context);
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assert(M && "Bad assembly?");
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return M;
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}
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TEST(DominatorTree, Unreachable) {
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StringRef ModuleString =
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"declare i32 @g()\n"
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"define void @f(i32 %x) personality i32 ()* @g {\n"
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"bb0:\n"
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" %y1 = add i32 %x, 1\n"
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" %y2 = add i32 %x, 1\n"
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" %y3 = invoke i32 @g() to label %bb1 unwind label %bb2\n"
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"bb1:\n"
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" %y4 = add i32 %x, 1\n"
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" br label %bb4\n"
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"bb2:\n"
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" %y5 = landingpad i32\n"
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" cleanup\n"
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" br label %bb4\n"
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"bb3:\n"
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" %y6 = add i32 %x, 1\n"
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" %y7 = add i32 %x, 1\n"
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" ret void\n"
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"bb4:\n"
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" %y8 = phi i32 [0, %bb2], [%y4, %bb1]\n"
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" %y9 = phi i32 [0, %bb2], [%y4, %bb1]\n"
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" ret void\n"
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"}\n";
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// Parse the module.
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LLVMContext Context;
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std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
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runWithDomTree(
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*M, "f",
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[&](Function &F, DominatorTree *DT, DominatorTreeBase<BasicBlock> *PDT) {
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Function::iterator FI = F.begin();
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BasicBlock *BB0 = &*FI++;
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BasicBlock::iterator BBI = BB0->begin();
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Instruction *Y1 = &*BBI++;
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Instruction *Y2 = &*BBI++;
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Instruction *Y3 = &*BBI++;
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BasicBlock *BB1 = &*FI++;
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BBI = BB1->begin();
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Instruction *Y4 = &*BBI++;
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BasicBlock *BB2 = &*FI++;
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BBI = BB2->begin();
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Instruction *Y5 = &*BBI++;
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BasicBlock *BB3 = &*FI++;
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BBI = BB3->begin();
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Instruction *Y6 = &*BBI++;
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Instruction *Y7 = &*BBI++;
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BasicBlock *BB4 = &*FI++;
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BBI = BB4->begin();
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Instruction *Y8 = &*BBI++;
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Instruction *Y9 = &*BBI++;
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// Reachability
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EXPECT_TRUE(DT->isReachableFromEntry(BB0));
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EXPECT_TRUE(DT->isReachableFromEntry(BB1));
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EXPECT_TRUE(DT->isReachableFromEntry(BB2));
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EXPECT_FALSE(DT->isReachableFromEntry(BB3));
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EXPECT_TRUE(DT->isReachableFromEntry(BB4));
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// BB dominance
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EXPECT_TRUE(DT->dominates(BB0, BB0));
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EXPECT_TRUE(DT->dominates(BB0, BB1));
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EXPECT_TRUE(DT->dominates(BB0, BB2));
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EXPECT_TRUE(DT->dominates(BB0, BB3));
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EXPECT_TRUE(DT->dominates(BB0, BB4));
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EXPECT_FALSE(DT->dominates(BB1, BB0));
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EXPECT_TRUE(DT->dominates(BB1, BB1));
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EXPECT_FALSE(DT->dominates(BB1, BB2));
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EXPECT_TRUE(DT->dominates(BB1, BB3));
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EXPECT_FALSE(DT->dominates(BB1, BB4));
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EXPECT_FALSE(DT->dominates(BB2, BB0));
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EXPECT_FALSE(DT->dominates(BB2, BB1));
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EXPECT_TRUE(DT->dominates(BB2, BB2));
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EXPECT_TRUE(DT->dominates(BB2, BB3));
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EXPECT_FALSE(DT->dominates(BB2, BB4));
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EXPECT_FALSE(DT->dominates(BB3, BB0));
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EXPECT_FALSE(DT->dominates(BB3, BB1));
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EXPECT_FALSE(DT->dominates(BB3, BB2));
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EXPECT_TRUE(DT->dominates(BB3, BB3));
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EXPECT_FALSE(DT->dominates(BB3, BB4));
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// BB proper dominance
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EXPECT_FALSE(DT->properlyDominates(BB0, BB0));
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EXPECT_TRUE(DT->properlyDominates(BB0, BB1));
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EXPECT_TRUE(DT->properlyDominates(BB0, BB2));
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EXPECT_TRUE(DT->properlyDominates(BB0, BB3));
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EXPECT_FALSE(DT->properlyDominates(BB1, BB0));
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EXPECT_FALSE(DT->properlyDominates(BB1, BB1));
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EXPECT_FALSE(DT->properlyDominates(BB1, BB2));
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EXPECT_TRUE(DT->properlyDominates(BB1, BB3));
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EXPECT_FALSE(DT->properlyDominates(BB2, BB0));
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EXPECT_FALSE(DT->properlyDominates(BB2, BB1));
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EXPECT_FALSE(DT->properlyDominates(BB2, BB2));
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EXPECT_TRUE(DT->properlyDominates(BB2, BB3));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB0));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB1));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB2));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB3));
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// Instruction dominance in the same reachable BB
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EXPECT_FALSE(DT->dominates(Y1, Y1));
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EXPECT_TRUE(DT->dominates(Y1, Y2));
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EXPECT_FALSE(DT->dominates(Y2, Y1));
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EXPECT_FALSE(DT->dominates(Y2, Y2));
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// Instruction dominance in the same unreachable BB
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EXPECT_TRUE(DT->dominates(Y6, Y6));
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EXPECT_TRUE(DT->dominates(Y6, Y7));
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EXPECT_TRUE(DT->dominates(Y7, Y6));
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EXPECT_TRUE(DT->dominates(Y7, Y7));
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// Invoke
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EXPECT_TRUE(DT->dominates(Y3, Y4));
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EXPECT_FALSE(DT->dominates(Y3, Y5));
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// Phi
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EXPECT_TRUE(DT->dominates(Y2, Y9));
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EXPECT_FALSE(DT->dominates(Y3, Y9));
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EXPECT_FALSE(DT->dominates(Y8, Y9));
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// Anything dominates unreachable
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EXPECT_TRUE(DT->dominates(Y1, Y6));
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EXPECT_TRUE(DT->dominates(Y3, Y6));
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// Unreachable doesn't dominate reachable
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EXPECT_FALSE(DT->dominates(Y6, Y1));
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// Instruction, BB dominance
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EXPECT_FALSE(DT->dominates(Y1, BB0));
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EXPECT_TRUE(DT->dominates(Y1, BB1));
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EXPECT_TRUE(DT->dominates(Y1, BB2));
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EXPECT_TRUE(DT->dominates(Y1, BB3));
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EXPECT_TRUE(DT->dominates(Y1, BB4));
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EXPECT_FALSE(DT->dominates(Y3, BB0));
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EXPECT_TRUE(DT->dominates(Y3, BB1));
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EXPECT_FALSE(DT->dominates(Y3, BB2));
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EXPECT_TRUE(DT->dominates(Y3, BB3));
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EXPECT_FALSE(DT->dominates(Y3, BB4));
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EXPECT_TRUE(DT->dominates(Y6, BB3));
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// Post dominance.
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EXPECT_TRUE(PDT->dominates(BB0, BB0));
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EXPECT_FALSE(PDT->dominates(BB1, BB0));
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EXPECT_FALSE(PDT->dominates(BB2, BB0));
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EXPECT_FALSE(PDT->dominates(BB3, BB0));
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EXPECT_TRUE(PDT->dominates(BB4, BB1));
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// Dominance descendants.
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SmallVector<BasicBlock *, 8> DominatedBBs, PostDominatedBBs;
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DT->getDescendants(BB0, DominatedBBs);
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PDT->getDescendants(BB0, PostDominatedBBs);
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EXPECT_EQ(DominatedBBs.size(), 4UL);
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EXPECT_EQ(PostDominatedBBs.size(), 1UL);
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// BB3 is unreachable. It should have no dominators nor postdominators.
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DominatedBBs.clear();
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PostDominatedBBs.clear();
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DT->getDescendants(BB3, DominatedBBs);
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DT->getDescendants(BB3, PostDominatedBBs);
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EXPECT_EQ(DominatedBBs.size(), 0UL);
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EXPECT_EQ(PostDominatedBBs.size(), 0UL);
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// Check DFS Numbers before
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EXPECT_EQ(DT->getNode(BB0)->getDFSNumIn(), 0UL);
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EXPECT_EQ(DT->getNode(BB0)->getDFSNumOut(), 7UL);
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EXPECT_EQ(DT->getNode(BB1)->getDFSNumIn(), 1UL);
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EXPECT_EQ(DT->getNode(BB1)->getDFSNumOut(), 2UL);
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EXPECT_EQ(DT->getNode(BB2)->getDFSNumIn(), 5UL);
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EXPECT_EQ(DT->getNode(BB2)->getDFSNumOut(), 6UL);
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EXPECT_EQ(DT->getNode(BB4)->getDFSNumIn(), 3UL);
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EXPECT_EQ(DT->getNode(BB4)->getDFSNumOut(), 4UL);
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// Reattach block 3 to block 1 and recalculate
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BB1->getTerminator()->eraseFromParent();
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BranchInst::Create(BB4, BB3, ConstantInt::getTrue(F.getContext()), BB1);
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DT->recalculate(F);
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// Check DFS Numbers after
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EXPECT_EQ(DT->getNode(BB0)->getDFSNumIn(), 0UL);
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EXPECT_EQ(DT->getNode(BB0)->getDFSNumOut(), 9UL);
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EXPECT_EQ(DT->getNode(BB1)->getDFSNumIn(), 1UL);
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EXPECT_EQ(DT->getNode(BB1)->getDFSNumOut(), 4UL);
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EXPECT_EQ(DT->getNode(BB2)->getDFSNumIn(), 7UL);
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EXPECT_EQ(DT->getNode(BB2)->getDFSNumOut(), 8UL);
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EXPECT_EQ(DT->getNode(BB3)->getDFSNumIn(), 2UL);
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EXPECT_EQ(DT->getNode(BB3)->getDFSNumOut(), 3UL);
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EXPECT_EQ(DT->getNode(BB4)->getDFSNumIn(), 5UL);
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EXPECT_EQ(DT->getNode(BB4)->getDFSNumOut(), 6UL);
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// Change root node
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DT->verifyDomTree();
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BasicBlock *NewEntry =
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BasicBlock::Create(F.getContext(), "new_entry", &F, BB0);
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BranchInst::Create(BB0, NewEntry);
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EXPECT_EQ(F.begin()->getName(), NewEntry->getName());
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EXPECT_TRUE(&F.getEntryBlock() == NewEntry);
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DT->setNewRoot(NewEntry);
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DT->verifyDomTree();
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});
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}
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TEST(DominatorTree, NonUniqueEdges) {
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StringRef ModuleString =
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"define i32 @f(i32 %i, i32 *%p) {\n"
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"bb0:\n"
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" store i32 %i, i32 *%p\n"
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" switch i32 %i, label %bb2 [\n"
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" i32 0, label %bb1\n"
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" i32 1, label %bb1\n"
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" ]\n"
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" bb1:\n"
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" ret i32 1\n"
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" bb2:\n"
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" ret i32 4\n"
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"}\n";
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// Parse the module.
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LLVMContext Context;
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std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
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runWithDomTree(
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*M, "f",
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[&](Function &F, DominatorTree *DT, DominatorTreeBase<BasicBlock> *PDT) {
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Function::iterator FI = F.begin();
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BasicBlock *BB0 = &*FI++;
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BasicBlock *BB1 = &*FI++;
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BasicBlock *BB2 = &*FI++;
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const TerminatorInst *TI = BB0->getTerminator();
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assert(TI->getNumSuccessors() == 3 && "Switch has three successors");
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BasicBlockEdge Edge_BB0_BB2(BB0, TI->getSuccessor(0));
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assert(Edge_BB0_BB2.getEnd() == BB2 &&
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"Default label is the 1st successor");
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BasicBlockEdge Edge_BB0_BB1_a(BB0, TI->getSuccessor(1));
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assert(Edge_BB0_BB1_a.getEnd() == BB1 && "BB1 is the 2nd successor");
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BasicBlockEdge Edge_BB0_BB1_b(BB0, TI->getSuccessor(2));
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assert(Edge_BB0_BB1_b.getEnd() == BB1 && "BB1 is the 3rd successor");
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EXPECT_TRUE(DT->dominates(Edge_BB0_BB2, BB2));
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EXPECT_FALSE(DT->dominates(Edge_BB0_BB2, BB1));
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EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_a, BB1));
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EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_b, BB1));
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EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_a, BB2));
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EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_b, BB2));
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});
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}
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