Ulrich Weigand 534abefa5c [PowerPC] Support all condition register logical instructions ...

This adds support for all missing condition register logical
instructions and extended mnemonics to the asm parser.

llvm-svn: 185387

2013-07-01 21:40:54 +00:00

..

Analysis

ValueTracking: Teach isKnownToBeAPowerOfTwo about (ADD X, (XOR X, Y)) where X is a power of two

2013-06-29 23:44:53 +00:00

AsmParser

Added support for the Builtin attribute.

2013-06-27 00:25:01 +00:00

Bitcode

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CodeGen

Make PBQP require/preserve MachineLoopInfo - the spiller requires it.

2013-07-01 20:47:47 +00:00

DebugInfo

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ExecutionEngine

AArch64: correct CodeGen of MOVZ/MOVK combinations.

2013-07-01 19:23:10 +00:00

IR

Debug Info: clean up usage of Verify.

2013-07-01 21:02:01 +00:00

IRReader

keep only the StringRef version of getFileOrSTDIN.

2013-06-25 05:28:34 +00:00

Linker

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MC

Use MCFillFragment for zero-initialized data.

2013-06-27 14:35:03 +00:00

Object

Make a switch in createBinary fully-covered. Add forgotten macho_dsym_companion case.

2013-06-28 09:44:05 +00:00

Option

Fix a crash bug in dumping options with groups

2013-06-26 22:43:37 +00:00

Support

Fix a bad overflow check pointed out by Ben.

2013-06-28 21:51:18 +00:00

TableGen

keep only the StringRef version of getFileOrSTDIN.

2013-06-25 05:28:34 +00:00

Target

[PowerPC] Support all condition register logical instructions

2013-07-01 21:40:54 +00:00

Transforms

Debug Info: clean up usage of Verify.

2013-07-01 21:02:01 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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