Simon Atanasyan 53bc9e3773 [mips][ias] Support .dtprel[d]word and .tprel[d]word directives ... Assembler directives .dtprelword, .dtpreldword, .tprelword, and .tpreldword generates relocations R_MIPS_TLS_DTPREL32, R_MIPS_TLS_DTPREL64, R_MIPS_TLS_TPREL32, and R_MIPS_TLS_TPREL64 respectively. The main motivation for this patch is to be able to write test cases for checking correctness of the LLD linker's behaviour. Differential Revision: https://reviews.llvm.org/D23669 llvm-svn: 279439		2016-08-22 16:18:42 +00:00
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AArch64	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
AMDGPU	[AMDGPU] refactor DS instruction definitions. NFC.	2016-08-01 14:21:30 +00:00
ARM	Correct the upper bound for a CBZ/CBNZ branch target.	2016-08-16 10:41:56 +00:00
AsmParser	Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"	2016-08-01 23:00:01 +00:00
COFF	[codeview] Shrink inlined call site line info tables	2016-07-14 23:47:15 +00:00
Disassembler	[mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix disassembly and add operand checking to existing B<cond>C implementations	2016-08-22 12:17:59 +00:00
ELF	Add initial support for R_386_GOT32X.	2016-07-06 21:19:11 +00:00
Hexagon	Remove redundant -mattr options from llvm-objdump commands.	2016-06-16 15:47:19 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	CodeGen: Use PLT relocations for relative references to unnamed_addr functions.	2016-04-22 20:40:10 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	[mips][ias] Support .dtprel[d]word and .tprel[d]word directives	2016-08-22 16:18:42 +00:00
PowerPC	Add aliases for mfvrsave/mtvrsave.	2016-06-09 23:27:48 +00:00
Sparc	Don't pass a Reloc::Model to MC.	2016-05-18 11:58:50 +00:00
SystemZ	[SystemZ] Add support for the .insn directive	2016-08-08 15:13:08 +00:00
X86	[X86] Improve code size on X86 segment moves	2016-08-08 18:01:04 +00:00