Daniel Sanders 6bf61e532c [globalisel] Add support for ValueType operands in patterns.
It's rare but there are a small number of patterns like this:
    (set i64:$dst, (add i64:$src1, i64:$src2))
These should be equivalent to register classes except they shouldn't check for
a specific register bank.

This doesn't occur in AArch64/ARM/X86 but does occasionally come up in other
in-tree targets such as BPF.

llvm-svn: 315226
2017-10-09 18:14:53 +00:00
2017-10-04 20:27:01 +00:00
2017-09-18 14:33:39 +00:00

Low Level Virtual Machine (LLVM)
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