Artem Tamazov cc6f4e6962 [AMDGPU][llvm-mc] s_setreg* - Fix order of operands ...

Order should match the sp3 syntax, where destination (simm16 denoting the hwreg) is coming first.

Differential Revision: http://reviews.llvm.org/D19161

llvm-svn: 266617

2016-04-18 14:54:26 +00:00

..

AArch64

MCParser: diagnose missing directional labels more clearly.

2016-04-11 19:50:46 +00:00

AMDGPU

[AMDGPU][llvm-mc] s_setreg* - Fix order of operands

2016-04-18 14:54:26 +00:00

ARM

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

AsmParser

[MCParser] Accept uppercase radix variants 0X and 0B

2016-03-18 18:22:07 +00:00

COFF

…

Disassembler

[AMDGPU][llvm-mc] s_setreg* - Fix order of operands

2016-04-18 14:54:26 +00:00

ELF

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Hexagon

Revert r265817

2016-04-08 18:15:37 +00:00

Lanai

[lanai] isBrImm should accept any non-constant immediate.

2016-03-31 17:58:55 +00:00

MachO

AsmParser: record "# line file" context to calculate location for diag

2016-04-13 19:46:54 +00:00

Markup

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Mips

[mips][ias] Prevent double-filling of delay slots by generating '.set noreorder' regions.

2016-04-18 12:35:36 +00:00

PowerPC

[PowerPC] Basic support for P9 byte comparison and count trailing zero insns

2016-04-13 18:51:18 +00:00

Sparc

Sparc: silently ignore .proc assembler directive

2016-03-28 14:00:11 +00:00

SystemZ

[SystemZ] Add SVC instruction

2016-04-11 14:35:39 +00:00

X86

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00