Nadav Rotem 6c79131e39 Add a new DAGCombine optimization for BUILD_VECTOR. ...

If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.

llvm-svn: 143297

2011-10-29 21:23:04 +00:00

..

ARM

Always use the string pool, even when it makes the .o larger. This may help

2011-10-28 05:29:47 +00:00

CBackend

Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported

2011-09-26 06:44:27 +00:00

CellSPU

Revert r143206, as there are still some failing tests.

2011-10-29 00:41:52 +00:00

CPP

manually upgrade a bunch of tests to modern syntax, and remove some that

2011-06-17 03:14:27 +00:00

Generic

Remove the the test which checks the saving of a vector of booleans into memory.

2011-10-16 19:06:06 +00:00

MBlaze

Change the default scheduler from Latency to ILP, since Latency

2011-10-24 17:45:02 +00:00

Mips

Revert r143206, as there are still some failing tests.

2011-10-29 00:41:52 +00:00

MSP430

Remove the explicit request for "Latency" scheduling from MSP430,

2011-10-24 17:53:16 +00:00

PowerPC

test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now.

2011-10-28 23:11:03 +00:00

PTX

Change the default scheduler from Latency to ILP, since Latency

2011-10-24 17:45:02 +00:00

SPARC

make the asmparser reject function and type redefinitions. 'Merging' hasn't been

2011-06-17 07:06:44 +00:00

Thumb

Revert r143206, as there are still some failing tests.

2011-10-29 00:41:52 +00:00

Thumb2

ARM Darwin default relocation model is PIC.

2011-09-30 17:41:35 +00:00

X86

Add a new DAGCombine optimization for BUILD_VECTOR.

2011-10-29 21:23:04 +00:00

XCore

Associate a MemOperand with LDWCP nodes introduced during ISel.

2011-09-12 14:43:23 +00:00