Simon Pilgrim da77fa96e5 [X86] ROR*mCL instruction models should match ROL*mCL etc. ...

Confirmed with Craig Topper - fix a typo that was missing a Port4 uop for ROR*mCL instructions on some Intel models.

Yet another step on the scheduler model cleanup marathon......

llvm-svn: 342846

2018-09-23 19:16:01 +00:00

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Analysis

[SystemZ] Adjust cost functions for subtargets that use LI + LOC instead of IPM

2018-09-14 06:46:55 +00:00

Assembler

[test] Fix Assembler/debug-info.ll

2018-09-21 12:28:44 +00:00

Bindings

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Bitcode

[Bitcode] Address backwards compat bug in r342631

2018-09-20 18:59:33 +00:00

BugPoint

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CodeGen

[DAGCombiner][x86] extend decompose of integer multiply into shift/add with negation

2018-09-23 18:41:38 +00:00

DebugInfo

[NativePDB] Add support for reading function signatures.

2018-09-21 22:36:28 +00:00

Demangle

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Examples

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ExecutionEngine

[MIPS] ORC JIT support

2018-09-11 13:10:04 +00:00

Feature

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FileCheck

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Instrumentation

[SanitizerCoverage] Create comdat for global arrays.

2018-09-13 21:45:55 +00:00

Integer

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JitListener

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Linker

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LTO

Pass code-model through Module IR to LTO which will use it.

2018-09-21 18:41:31 +00:00

MC

[lib/MC] - Set SHF_EXCLUDE flag for .dwo sections.

2018-09-22 07:36:20 +00:00

Object

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ObjectYAML

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Other

[New PM][PassInstrumentation] Adding PassInstrumentation to the AnalysisManager runs

2018-09-21 22:10:17 +00:00

SafepointIRVerifier

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SymbolRewriter

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TableGen

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ThinLTO/X86

[ThinLTO] Write TYPE_IDs for types used in functions imported by aliases

2018-09-19 18:51:42 +00:00

tools

[X86] ROR*mCL instruction models should match ROL*mCL etc.

2018-09-23 19:16:01 +00:00

Transforms

[WholeProgramDevirt] Don't process declarations when building type id map

2018-09-23 13:27:47 +00:00

Unit

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Verifier

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YAMLParser

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.clang-format

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CMakeLists.txt

Add dependency on new llvm-cxxmap tool to check-llvm.

2018-09-13 21:15:34 +00:00

lit.cfg.py

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lit.site.cfg.py.in

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TestRunner.sh

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