RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-26 22:34:39 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
llvm-mirror/test/MC/Mips/mips64r5
History
Daniel Sanders b74cf30c85 [mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail.s's. 
Summary:
valid-xfail.s is for instructions that should be valid in the given ISA but
incorrectly fail. DSP/DSPr2 instructions are correct to fail since DSP/DSPr2 is
not enabled.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D15072

llvm-svn: 254911
2015-12-07 14:12:44 +00:00
..
abi-bad.s
…
abiflags.s
…
invalid-mips64.s
[mips] Added support for the ERETNC instruction.
2015-07-20 12:28:56 +00:00
invalid-mips64r2.s
[mips] Added support for the ERETNC instruction.
2015-07-20 12:28:56 +00:00
invalid-mips64r3.s
[mips] Added support for the ERETNC instruction.
2015-07-20 12:28:56 +00:00
invalid.s
[mips][ias] Range check uimm5 operands and fix several bugs this revealed.
2015-11-26 16:35:41 +00:00
valid-xfail.s
[mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail.s's.
2015-12-07 14:12:44 +00:00
valid.s
[mips] Added support for various EVA ASE instructions.
2015-09-15 10:02:16 +00:00