Matt Arsenault 100b40be1a TableGen: Add address space to matchers ...

Currently AMDGPU uses a CodePatPred to check address spaces from the
MachineMemOperand. Introduce a new first class property so that the
existing patterns can be easily modified to uses the new generated
predicate, which will also be handled for GlobalISel.

I would prefer these to match against the pointer type of the
instruction, but that would be difficult to get working with
SelectionDAG compatbility. This is much easier for now and will avoid
a painful tablegen rewrite for all the loads and stores.

I'm also not sure if there's a better way to encode multiple address
spaces in the table, rather than putting the number to expect.

llvm-svn: 366128

2019-07-15 20:59:42 +00:00

..

llvm

TableGen: Add address space to matchers

2019-07-15 20:59:42 +00:00

llvm-c

[ThinLTO]LTO]Legacy] Fix dependent libraries support by adding querying of the IRSymtab

2019-06-12 11:07:56 +00:00