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56b0c33a9d
require RIP-relative addressing and use it to fix a bug in X86FastISel in x86-64 PIC mode, where it was trying to use base/index registers with RIP-relative addresses. This fixes a bunch of x86-64 testsuite failures. llvm-svn: 56676
116 lines
4.1 KiB
C++
116 lines
4.1 KiB
C++
//===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86TARGETMACHINE_H
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#define X86TARGETMACHINE_H
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "X86.h"
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#include "X86ELFWriterInfo.h"
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#include "X86InstrInfo.h"
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#include "X86JITInfo.h"
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#include "X86Subtarget.h"
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#include "X86ISelLowering.h"
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namespace llvm {
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class raw_ostream;
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class X86TargetMachine : public LLVMTargetMachine {
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X86Subtarget Subtarget;
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const TargetData DataLayout; // Calculates type size & alignment
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TargetFrameInfo FrameInfo;
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X86InstrInfo InstrInfo;
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X86JITInfo JITInfo;
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X86TargetLowering TLInfo;
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X86ELFWriterInfo ELFWriterInfo;
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Reloc::Model DefRelocModel; // Reloc model before it's overridden.
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protected:
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virtual const TargetAsmInfo *createTargetAsmInfo() const;
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// To avoid having target depend on the asmprinter stuff libraries, asmprinter
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// set this functions to ctor pointer at startup time if they are linked in.
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typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
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X86TargetMachine &tm);
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static AsmPrinterCtorFn AsmPrinterCtor;
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public:
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X86TargetMachine(const Module &M, const std::string &FS, bool is64Bit);
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virtual const X86InstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual X86JITInfo *getJITInfo() { return &JITInfo; }
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virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; }
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virtual X86TargetLowering *getTargetLowering() const {
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return const_cast<X86TargetLowering*>(&TLInfo);
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}
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virtual const X86RegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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}
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const X86ELFWriterInfo *getELFWriterInfo() const {
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return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
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}
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static unsigned getModuleMatchQuality(const Module &M);
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static unsigned getJITMatchQuality();
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static void registerAsmPrinter(AsmPrinterCtorFn F) {
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AsmPrinterCtor = F;
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}
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// Set up the pass pipeline.
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virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
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virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast);
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virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
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virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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raw_ostream &Out);
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virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
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bool DumpAsm, MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
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bool DumpAsm, MachineCodeEmitter &MCE);
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// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
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// RIP-relative on this machine, taking into consideration the relocation
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// model and subtarget. RIP-relative addresses cannot have a separate
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// base or index register.
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bool symbolicAddressesAreRIPRel() const;
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};
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/// X86_32TargetMachine - X86 32-bit target machine.
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///
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class X86_32TargetMachine : public X86TargetMachine {
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public:
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X86_32TargetMachine(const Module &M, const std::string &FS);
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static unsigned getJITMatchQuality();
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static unsigned getModuleMatchQuality(const Module &M);
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};
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/// X86_64TargetMachine - X86 64-bit target machine.
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///
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class X86_64TargetMachine : public X86TargetMachine {
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public:
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X86_64TargetMachine(const Module &M, const std::string &FS);
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static unsigned getJITMatchQuality();
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static unsigned getModuleMatchQuality(const Module &M);
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};
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} // End llvm namespace
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#endif
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