Akira Hatanaka 8728f4ed69 Add code in MipsDAGToDAGISel for selecting constant +0.0. ... MIPS64 can generate constant +0.0 with a single DMTC1 instruction. llvm-svn: 146999		2011-12-20 22:25:50 +00:00
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ARM	Heed spill slot alignment on ARM.	2011-12-20 22:15:04 +00:00
CBackend	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
CellSPU
CPP
Generic	Manually upgrade the test suite to specify the flag to cttz and ctlz.	2011-12-12 11:59:10 +00:00
Hexagon	Hexagon: Fix a nasty order-of-initialization bug.	2011-12-16 19:08:59 +00:00
MBlaze
Mips	Add code in MipsDAGToDAGISel for selecting constant +0.0.	2011-12-20 22:25:50 +00:00
MSP430	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
PowerPC	Add a test case to make sure that the nop really does follow the bl on ppc64 elf	2011-12-15 17:59:23 +00:00
PTX	PTX: Continue to fix up the register mess.	2011-12-06 17:39:48 +00:00
SPARC	Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since	2011-12-03 21:24:48 +00:00
Thumb	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
Thumb2	Heed spill slot alignment on ARM.	2011-12-20 22:15:04 +00:00
X86	This is the second fix related to VZEXT_MOVL node.	2011-12-20 13:34:28 +00:00
XCore	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00