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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
42 lines
2.0 KiB
LLVM
42 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-apple-darwin -mattr=avx512f,avx512bw < %s | FileCheck %s --check-prefix=AVX512BW
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define <32 x double> @test_load_32f64(<32 x double>* %ptrs, <32 x i1> %mask, <32 x double> %src0) {
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; AVX512BW-LABEL: test_load_32f64:
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; AVX512BW: ## %bb.0:
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; AVX512BW-NEXT: vpsllw $7, %ymm0, %ymm0
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; AVX512BW-NEXT: vpmovb2m %zmm0, %k1
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; AVX512BW-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k1}
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; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
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; AVX512BW-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm5 {%k2}
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; AVX512BW-NEXT: kshiftrw $8, %k1, %k1
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; AVX512BW-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k1}
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; AVX512BW-NEXT: kshiftrw $8, %k2, %k1
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; AVX512BW-NEXT: vblendmpd 192(%rdi), %zmm4, %zmm3 {%k1}
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; AVX512BW-NEXT: vmovapd %zmm5, %zmm2
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; AVX512BW-NEXT: retq
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%res = call <32 x double> @llvm.masked.load.v32f64.p0v32f64(<32 x double>* %ptrs, i32 4, <32 x i1> %mask, <32 x double> %src0)
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ret <32 x double> %res
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}
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define <32 x i64> @test_load_32i64(<32 x i64>* %ptrs, <32 x i1> %mask, <32 x i64> %src0) {
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; AVX512BW-LABEL: test_load_32i64:
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; AVX512BW: ## %bb.0:
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; AVX512BW-NEXT: vpsllw $7, %ymm0, %ymm0
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; AVX512BW-NEXT: vpmovb2m %zmm0, %k1
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; AVX512BW-NEXT: vpblendmq (%rdi), %zmm1, %zmm0 {%k1}
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; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
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; AVX512BW-NEXT: vpblendmq 128(%rdi), %zmm3, %zmm5 {%k2}
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; AVX512BW-NEXT: kshiftrw $8, %k1, %k1
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; AVX512BW-NEXT: vpblendmq 64(%rdi), %zmm2, %zmm1 {%k1}
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; AVX512BW-NEXT: kshiftrw $8, %k2, %k1
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; AVX512BW-NEXT: vpblendmq 192(%rdi), %zmm4, %zmm3 {%k1}
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; AVX512BW-NEXT: vmovdqa64 %zmm5, %zmm2
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; AVX512BW-NEXT: retq
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%res = call <32 x i64> @llvm.masked.load.v32i64.p0v32i64(<32 x i64>* %ptrs, i32 4, <32 x i1> %mask, <32 x i64> %src0)
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ret <32 x i64> %res
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}
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declare <32 x i64> @llvm.masked.load.v32i64.p0v32i64(<32 x i64>* %ptrs, i32, <32 x i1> %mask, <32 x i64> %src0)
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declare <32 x double> @llvm.masked.load.v32f64.p0v32f64(<32 x double>* %ptrs, i32, <32 x i1> %mask, <32 x double> %src0)
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