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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
58 lines
2.2 KiB
LLVM
58 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
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define <2 x i64> @PR32907(<2 x i64> %astype.i, <2 x i64> %astype6.i) {
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; SSE2-LABEL: PR32907:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: psubq %xmm1, %xmm0
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; SSE2-NEXT: movdqa %xmm0, %xmm1
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; SSE2-NEXT: psrad $31, %xmm1
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; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: psubq %xmm0, %xmm1
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; SSE2-NEXT: pand %xmm2, %xmm1
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; SSE2-NEXT: pandn %xmm0, %xmm2
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; SSE2-NEXT: por %xmm2, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE42-LABEL: PR32907:
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; SSE42: # %bb.0: # %entry
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; SSE42-NEXT: psubq %xmm1, %xmm0
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; SSE42-NEXT: pxor %xmm1, %xmm1
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; SSE42-NEXT: pcmpgtq %xmm0, %xmm1
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; SSE42-NEXT: pxor %xmm1, %xmm0
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; SSE42-NEXT: psubq %xmm1, %xmm0
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; SSE42-NEXT: retq
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;
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; AVX2-LABEL: PR32907:
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; AVX2: # %bb.0: # %entry
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; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm1
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; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: PR32907:
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; AVX512: # %bb.0: # %entry
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; AVX512-NEXT: vpsubq %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vpsraq $63, %zmm0, %zmm1
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; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vpsubq %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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entry:
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%sub13.i = sub <2 x i64> %astype.i, %astype6.i
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%x.lobit.i.i = ashr <2 x i64> %sub13.i, <i64 63, i64 63>
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%sub.i.i = sub <2 x i64> zeroinitializer, %sub13.i
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%0 = xor <2 x i64> %x.lobit.i.i, <i64 -1, i64 -1>
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%1 = and <2 x i64> %sub13.i, %0
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%2 = and <2 x i64> %x.lobit.i.i, %sub.i.i
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%cond.i.i = or <2 x i64> %1, %2
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ret <2 x i64> %cond.i.i
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}
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